Browse Prior Art Database

Integratable Recess 2 Process for Memory Structures

IP.com Disclosure Number: IPCOM000121717D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 2 page(s) / 69K

Publishing Venue

IBM

Related People

Horak, DV: AUTHOR [+4]

Abstract

This article describes a simplified process sequence to produce recessed trench fill and isolation trenches with a reduced number of tool insertions/exits.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 54% of the total text.

Integratable Recess 2 Process for Memory Structures

      This article describes a simplified process sequence to
produce recessed trench fill and isolation trenches with a reduced
number of tool insertions/exits.

      Polysilicon is used to fill deep storage trenches and is the
medium upon which cell charge is stored. This polysilicon trench fill
passes beneath both cell and passing word lines. In order to decrease
wordline-to-fill capacitive loading and short frequency, the fill is
recessed below the silicon surface level (known as "recess 2"). The
recessed space is subsequently filled with oxide and planarized.
Because multi-chamber tools (cluster tools) can perform routine
sequential operations, process sequences are important in order to
maximize tool utilization. Recess 2, however, is less integratable.
For control reasons, following deposition and anneal of the second
polysilicon fill, the poly is polished back to the pad nitride level
rather than etched. Immediately following recess 2 is isolation mask
(IT) exposure.  Neither of these steps can be clustered with recess
2, despite the fact that recess 2 is performed on a tool designed for
cluster operation.  After IT mask exposure, wafers are sent back to a
cluster tool for shallow trench RIE. Lack of clusterability results
in increased cost and cycle time.

      Referring to the figure, a process sequence is shown from
second fill planarization through IT RIE. In the usual flow, step A
(shown after...