Browse Prior Art Database

Rotational DASD Transfer Time Improvements

IP.com Disclosure Number: IPCOM000121759D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Cath, RG: AUTHOR

Abstract

Conventional rotating Direct Access Storage Device (DASD) interfaces do not necessarily support the transfer of recorded data in the optimum sequence. Disclosed is a method of improving the time taken to read or write data transfers to or from a host CPU store by means of a Conditional Read or Write order.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Rotational DASD Transfer Time Improvements

      Conventional rotating Direct Access Storage Device (DASD)
interfaces do not necessarily support the transfer of recorded data
in the optimum sequence.  Disclosed is a method of improving the time
taken to read or write data transfers to or from a host CPU store by
means of a Conditional Read or Write order.

      The time between a read/write head being ready to transfer data
and the disk rotating to bring the first required block of data under
the head is called the latency. The time for all the required data to
pass under the head is called disk transfer time and the time
required to transfer data across the data channel into host memory is
called pipeline time.  If data is transferred from disk in ascending
logical block order from the first required to the last required, the
average time for the transfer will be:
      X + P + R/2
where R is the time for one rotation, X is the disk transfer time and
P is the pipeline time.

      Sometimes the read/write head will become ready to transfer
data when it is positioned somewhere after the first required block
and before the last required.  If data is transferred starting from
the first block available under the head proceeding to the last
required and then, when the disk has rotated, continuing with the
first required and all other untransferred blocks, the apparent
latency will be reduced as follows:
      probability of head coming ready between first and last
      = X/R
      ave...