Browse Prior Art Database

A Self Aligned DRAM Cell Structure and Fabrication Process

IP.com Disclosure Number: IPCOM000121834D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 1 page(s) / 67K

Publishing Venue

IBM

Related People

Chang, WH: AUTHOR

Abstract

This article discloses a structure and a process for fabricating a high density trench DRAM cell with its transfer gate self-aligned to the buried storage capacitance and with its storage capacitance increased about two times for the same trench depth as in prior art structures. The cell structure is depicted in Fig. 1. The transfer gate lies on the top portion of the trench and is self-aligned to the isolation. The storage node is a heavily doped shell which is an extension of the bottom diffusion of the transfer gate. The shell is surrounded by the storage insulator on both inside and outside surfaces of the shell; thus the area for information storage is increased about two times for the same trench opening depth.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 69% of the total text.

A Self Aligned DRAM Cell Structure and Fabrication Process

      This article discloses a structure and a process for
fabricating a high density trench DRAM cell with its transfer gate
self-aligned to the buried storage capacitance and with its storage
capacitance increased about two times for the same trench depth as in
prior art structures.  The cell structure is depicted in Fig. 1.  The
transfer gate lies on the top portion of the trench and is
self-aligned to the isolation.  The storage node is a heavily doped
shell which is an extension of the bottom diffusion of the transfer
gate.  The shell is surrounded by the storage insulator on both
inside and outside surfaces of the shell; thus the area for
information storage is increased about two times for the same trench
opening depth.  The whole structure can be located within an n-well
or a p-well structure to improve alpha-particle immunity and to
reduce trench cell gated diode leakage current.  The process starts
with the formation of shallow trench in insulating material on the
surface of a semiconductor substrate. The insulation is then used as
a mask to RIE a silicon trench.  The trench surface is then oxidized
and filled with a doped poly.  The poly is etched back and a nitride
spacer is formed on the side walls of the insulator.  The spacer is
used as mask to RIE poly down through the silicon.  A second trench
sidewall oxidation then takes place and an anitropic etching is
performed to expose silicon a...