Browse Prior Art Database

A Self Aligned Twin DRAM Cell Structure

IP.com Disclosure Number: IPCOM000121837D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 1 page(s) / 66K

Publishing Venue

IBM

Related People

Chang, WH: AUTHOR [+2]

Abstract

This disclosure discloses the structure and a process to fabricate a high density trench DRAM cell with its transfer gate self-aligned to the buried storage capacitance and with its storage capacitance increased about two times for the same trench depth. Two DRAM cells are located in a single trench. The cell structure is depicted in Fig. 1. The transfer gate lies on the top portion of the trench and is self-aligned to the isolation. The storage node is a heavily doped shell which is an extension of the bottom diffusion of the transfer gate. The shell is surrounded by the storage insulator on both inside and outside surfaces of the shell; thus, the area for information storage is increased about two times for the same trench opening depth.

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A Self Aligned Twin DRAM Cell Structure

      This disclosure discloses the structure and a process to
fabricate a high density trench DRAM cell with its transfer gate
self-aligned to the buried storage capacitance and with its storage
capacitance increased about two times for the same trench depth.  Two
DRAM cells are located in a single trench.  The cell structure is
depicted in Fig. 1.  The transfer gate lies on the top portion of the
trench and is self-aligned to the isolation.  The storage node is a
heavily doped shell which is an extension of the bottom diffusion of
the transfer gate.  The shell is surrounded by the storage insulator
on both inside and outside surfaces of the shell; thus, the area for
information storage is increased about two times for the same trench
opening depth. The whole structure can be located within an n-well or
a p-well structure to improve alpha-particle immunity and to reduce
trench cell gated diode leakage current problem.  The process starts
with the formation of shallow trench isolation, then uses it as mask
to RIE silicon trench.  The trench surface is then oxidized and
filled with a doped poly.  The poly is etched back and a nitride
spacer is formed inside the trench.  The spacer is used as mask to
RIE poly down to silicon.  A second trench sidewall oxidation then
takes place and an anitropic etching is performed to expose silicon
at trench bottom.  A selective silicon growth with opposite polarity
doping is then grown...