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Dynamic Self Repair Redundancy System

IP.com Disclosure Number: IPCOM000122031D
Original Publication Date: 1991-Oct-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Related People

Loehlein, WD: AUTHOR [+3]

Abstract

A first ABIST (array built-in self-test) tests the array to detect initial fails and decide whether the array is fixable. In the case of a soft fail, there are two possibilities. The failed part is declared non-fixable or the conventional fusebook is programmed with the defective address acting as a replacement wordline. For hard fails, the defective address, stored in the fail address register, is fed through the multiplexer to the array. A second ABIST tests the array a second time with the replaced wordline. A successful fix prompts the final chip pass/fail latch to indicate an "all good chip".

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This is the abbreviated version, containing approximately 66% of the total text.

Dynamic Self Repair Redundancy System

      A first ABIST (array built-in self-test) tests the array
to detect initial fails and decide whether the array is fixable.  In
the case of a soft fail, there are two possibilities.  The failed
part is declared non-fixable or the conventional fusebook is
programmed with the defective address acting as a replacement
wordline.  For hard fails, the defective address, stored in the fail
address register, is fed through the multiplexer to the array.  A
second ABIST tests the array a second time with the replaced
wordline.  A successful fix prompts the final chip pass/fail latch to
indicate an "all good chip".

      Fig. 1 shows the array under test, the ABIST, the fail address
register, and the conventional fusebook.

      Fig. 2 is a schematic of add-on logic for a dynamic repair
feature.  The fail address registers available (e.g., 4 x 8 for 4
wordline redundancy and 8 word addresses) and the "dirty bit"
register of the present ABIST are used automatically to program the
array fuse inputs, so that testing and fixing of the array may be
carried out after installation.  The output of the registers is fed
through a multiplexer to the array fuse inputs.  The "dirty bit"
register (which, when set, indicates that a valid address is stored
in the address fail register) is used as the fuse enable input of the
array.  With a conventional fusebook in place, the enable signal from
the fusebook switches the multiplexer to th...