Browse Prior Art Database

Silicon Disk Memory Interface

IP.com Disclosure Number: IPCOM000122153D
Original Publication Date: 1991-Nov-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Asano, H: AUTHOR

Abstract

Disclosed is a memory allocation method, memory interface definition, and 8 to 9 bit bus width conversion circuit used for silicon disk.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Silicon Disk Memory Interface

      Disclosed is a memory allocation method, memory interface
definition, and 8 to 9 bit bus width conversion circuit used for
silicon disk.

      Silicon disk interface is defined in the same manner as hard
file which contains information of Head, Cylinder, Sector, 512-byte
data, ECC data, etc., in one sector. Silicon disk memory area is
addressed by byte address and not RBA (relative block address) used
in hard file. Therefore, a sector address boundary is preferable to
be a multiple of 2.  Information in one sector has more than 512
bytes but less than 576 bytes.  Having 9 bits in one row enables the
sector address boundary as a multiple of 2.  The interface between
the memory chip and controller converts 8 to 9 or 9 to 8 bit width
automatically.

      Fig. 1 shows an automatic bit width conversion circuit. FLASH
EEPROM erasing capability is at least 512 bytes.  One block has 512-
byte boundary with 9 bit width.  Read/Write data is temporarily
stored in a block buffer in the controller.  After transferring all
data from/to memory, data becomes available.  Fig. 2 shows data
structure of each block.