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Browse Prior Art Database

Programmable Physical Address With Broadcast Writeable Page Register

IP.com Disclosure Number: IPCOM000122154D
Original Publication Date: 1991-Nov-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Andrews, LP: AUTHOR [+5]

Abstract

This article describes a scheme for a microprocessor controller to assign physical addresses to resources (devices) on the address bus and to select different devices through the use of a page register.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 63% of the total text.

Programmable Physical Address With Broadcast Writeable Page Register

      This article describes a scheme for a microprocessor
controller to assign physical addresses to resources (devices) on the
address bus and to select different devices through the use of a page
register.

      Most devices on a microprocessor-based system are addressed by
the comparison of an address on the address bus to a physical address
associated with the desired device. The physical address associated
with each device must be unique.  Typically, the physical addresses
are assigned by either jumpers or switches located on each device.

      On microprocessor systems where the memory map is restricted to
the area of a single device by the size of the address bus, paging
systems are used to access different devices.

      Presented herein is a method to provide programmable physical
addresses to the devices of a microprocessor-based system.  Also, a
method of selecting different devices is provided through the use of
a page register.

      In the example shown in the figure, an Intel 80186
microprocessor must access several devices.  Upon initialization, the
80186 microprocessor uses one of its seven peripheral chip select
(PCS) lines to access individual physical address registers located
on each device.  PCS 1 will write to the physical address register on
the first device on the bus.  At this time a physical address will be
loaded by the microprocessor to the first d...