Browse Prior Art Database

Multiple Layer Priority Mechanism for a Random Access Memory

IP.com Disclosure Number: IPCOM000122396D
Original Publication Date: 1991-Dec-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 82K

Publishing Venue

IBM

Related People

Stacy, JK: AUTHOR

Abstract

Disclosed is an arbitration mechanism that dynamically allocates access to Random-Access Memory (RAM) cycles based on the needs of the current set of requesters. Access priority readjusts during each RAM cycle on the basis of which users had access in previous RAM cycles and which users are currently requesting access.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Multiple Layer Priority Mechanism for a Random Access Memory

      Disclosed is an arbitration mechanism that dynamically
allocates access to Random-Access Memory (RAM) cycles based on the
needs of the current set of requesters.  Access priority readjusts
during each RAM cycle on the basis of which users had access in
previous RAM cycles and which users are currently requesting access.

      Multiple users need access to one single-port RAM. Each user
has different access needs.  Some users must have immediate access,
upon request, to maintain synchronous data transfers.  Other users
have less critical RAM access needs, but limiting their access when
the RAM is not busy with critical users adversely affects
performance.

      One RAM cycle is a fixed length of time, depending on the type
of RAM used and circuit design around the RAM. Only one user can
obtain access to the RAM for a particular RAM cycle.  The access
pattern over twelve RAM cycles for a particular four-user
configuration is shown below.  In this example, for any single RAM
cycle there are sixteen possible combinations of RAM access requests.
Each one of these combinations produces a fixed pattern of accesses
based on which users gained access in preceding cycles and which
users are currently requesting access.  The sixteen combinations can
be divided into one of five types of combinations:
      1.   no request active
      2.   one request active
      3.   two requests active
      4.   three requests active
      5.   four requests active

      The first type is the idle state in which no user requires
access.  The second type involves a RAM access request from a single
user.  In this case...