Browse Prior Art Database

Reliable Switching Through Parity Check Coding

IP.com Disclosure Number: IPCOM000122440D
Original Publication Date: 1991-Dec-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 5 page(s) / 240K

Publishing Venue

IBM

Related People

Ancheta, TC: AUTHOR [+2]

Abstract

Described is a switch invariant parity check code mechanism which is designed to improve the reliability of switching subsystems. Switch variant codes are used to make efficient use of redundant switches. When switches are detected to have an error, the concept allows the function to continue by providing the theoretical, most likely switch output even in the presence of errors in the switches.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 28% of the total text.

Reliable Switching Through Parity Check Coding

      Described is a switch invariant parity check code
mechanism which is designed to improve the reliability of switching
subsystems.  Switch variant codes are used to make efficient use of
redundant switches.  When switches are detected to have an error, the
concept allows the function to continue by providing the theoretical,
most likely switch output even in the presence of errors in the
switches.

      In Time Division Multiplex  (TDM) switching systems, the digits
in a given time slot, or of an entire frame, can be looked upon as
a binary vector u=u1, u2, ...u1k whose digits are permuted by the
switch to form a binary output vector x=x1, x2, ...xk .  The output
vector has the form x=uS where S is an kxk matrix with binary
elements representing the operation of the switch and where the
matrix operation is performed under the binary field.  In the concept
described herein, only time slots or frames are considered when S is
a permutation matrix so that S contains exactly one non-zero element
in each row or column.  In such cases, a normally operating switch
provides an output which has the same number of zeros as the input.
Therefore, by comparing the number of non-zero digits in the output x
with that of the input u, a faulty switch can be detected.  For
practical reasons, however, the state-of-the-art detection of a
faulty switch is implemented by taking the parity of the input and
the output digits.

      Fig. 1 shows the prior-art, conventional method of using
redundancy to improve switching reliability.  Redundant switches are
used as backup to perform the same function as the principal switch.
For each switch, an error detecting mechanism is included to indicate
the faulty operation of its associated switch.  Once an error is
detected in a given switch, the output of the system is switched to
the output of a backup component.  In this method, the probability of
failure PS=eM of a system of M redundant switches is the probability
that all such switches have failed and is seen to have the form
PS=eM, where e is the probability of failure of one switch.  Thus, a
goal of PS=10-10 may be achieved by two switches with e=10-5, but
would require five switches with e=10-2 .  For the case when e is
very small, the method of switching in a spare when a switching
component fails achieves a respectable probability of failure.  It is
also small when the probability of error e in a given output line of
a kxk switch is statistically independent to those of other lines,
such as when e=1-(1-e)k .  In commercially available switches, k is
the order of 16&k&32 so that eZke providing a system reliability of
PS=kMeM, where e being a circuit variable is constant. Since PS does
not improve with M, switching backup components is rather redundant
and is similar to the extravagant use of repetition digits of
redundant bits in error correcting codes.

      A binary linear (n,k) co...