Browse Prior Art Database

Dense Packaging

IP.com Disclosure Number: IPCOM000122533D
Original Publication Date: 1991-Dec-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 3 page(s) / 105K

Publishing Venue

IBM

Related People

Marquart, B: AUTHOR [+2]

Abstract

Currently, the packaging of mid- to high-end computers consists of the following elements: chip, multilayer ceramic (MLC) (1st level), and board (2nd level).

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Dense Packaging

      Currently, the packaging of mid- to high-end computers
consists of the following elements:
      chip,
      multilayer ceramic (MLC) (1st level), and
      board (2nd level).

      During the operation of the computer, electric energy is
transformed into heat which has to be discharged by sensitive
component groups to avoid faulty operation or failure.  As the amount
of heat to be discharged per unit area increases with the packing
density, sophisticated heat discharge means are required.

      The MLC module (chip carrier) is plugged into the board by pins
(present maximum number about 6000).  The form (size) of the pins
reduces the contact density obtainable. The main factors limiting the
packing density are the number of packaging levels required, the
increasingly complicated heat discharge, and the pin size.

      The approach described below largely eliminates these
difficulties and allows much higher packing densities.  A special
multilayer/ multisegment substrate is used as a first packaging
level.  This wiring substrate consists of numerous parts of
relatively small size which are produced separately as subunits and
which are eventually combined to form the multilayer wiring structure
(Fig. 1). Each individual layer of the final structure is produced by
joining a set of subunits in one plane.  The entire multilayer
substrate is then built by stacking these layers preferably such that
they are laterally displaced relative to each other and the edges of
vertically adjacent subunits are staggered.  The subunits are
provided on their front and rear side, respectively, with at least
one layer of conductive material which can be patterned...