Browse Prior Art Database

Reduction of Emitter Processing Temperature for Bipolar Transistor Processing

IP.com Disclosure Number: IPCOM000122569D
Original Publication Date: 1991-Dec-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 73K

Publishing Venue

IBM

Related People

Blouse, JL: AUTHOR [+4]

Abstract

Disclosed is a process for reducing the emitter processing temperature during the fabrication of NPN bipolar transistors. The process consists of depositing LPCVD in-situ phosphorus-doped amorphous silicon in place of the usual LPCVD polysilicon. The emitter anneal is a single low-temperature anneal, e.g., 800oC, 20 minutes.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Reduction of Emitter Processing Temperature for Bipolar Transistor
Processing

      Disclosed is a process for reducing the emitter
processing temperature during the fabrication of NPN bipolar
transistors.  The process consists of depositing LPCVD in-situ
phosphorus-doped amorphous silicon in place of the usual LPCVD
polysilicon.  The emitter anneal is a single low-temperature anneal,
e.g., 800oC, 20 minutes.

      As the bipolar transistor size is scaled down, the base width
is reduced.  Formation of the emitter by diffusion contributes to
increasing the base width.  In addition, with the use of
strained-layer silicon-germanium for the base, the post-base
processing has the possibility of forming dislocations, and these
dislocations can propagate into the active area of the device.
Reduction of the post-base processing temperature is, therefore,
becoming increasingly important.  In addition, reduction of emitter
processing simplifies BiCMOS process design by reducing the
degradation in the FET source-drain profile, if they are formed
before the emitter anneal.

      The diffusion temperature can be reduced by using phosphorus
instead of arsenic.  Because of the phosphorus "kink" effect (1), the
amount of dopant in the single-crystal emitter is reduced, and the
current gain is, therefore, reduced.  However, if a heterojunction
transistor is being considered, high current gain can still be
obtained.  On the basis of diffusion conditions alone, we have found
that the temperature can be reduced to 800oC for a 55 nm emitter
depth.

      The activation anneal can be eliminated by using in-situ doped
amo...