Browse Prior Art Database

Thin Film Wafer Bonded Silicon On Insulator

IP.com Disclosure Number: IPCOM000122764D
Original Publication Date: 1991-Dec-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 1 page(s) / 41K

Publishing Venue

IBM

Related People

Hovel, H: AUTHOR

Abstract

Disclosed is a method for producing thin film wafer-bonded silicon-on-insulator (SOI) structures using heteroepitaxy. An intermediate layer between the Si active device region and the Si substrate serves either as an etch stop layer or lift-off layer in producing the structure.

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Thin Film Wafer Bonded Silicon On Insulator

      Disclosed is a method for producing thin film wafer-bonded
silicon-on-insulator (SOI) structures using heteroepitaxy. An
intermediate layer between the Si active device region and the Si
substrate serves either as an etch stop layer or lift-off layer in
producing the structure.

      In the first embodiment, a thin layer of lattice-matched
material such as GaP is grown upon a Si substrate, followed by Si
epitaxy and oxidation of the epitaxial Si.  This structure is then
bonded, oxide to oxide, upon a second, oxidized Si wafer using
standard wafer bonding techniques.  The upper Si substrate is then
removed by use either of 1) a preferential etch for Si that leaves
the heteroepitaxial layer in place, then removal of the layer leaving
the thin active Si region behind, or 2) an etch that lifts off the Si
wafer by etching away the heteroepitaxial layer, which also leaves
the thin Si active region behind for subsequent circuit processing.

      In a second embodiment, heteroepitaxial materials can be used
which are not lattice matched to Si if either 1) the heterolayer is
thin enough that it is pseudomorphic so that no structural defects
are formed, or 2) a superlattice is used as the etch stop or lift-off
region.  In this case, any misfit dislocations formed are bent into
the plane of the interface and do not propagate into the epitaxial Si
active layer.

      Candidates for intermediate layers include GaP,...