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Browse Prior Art Database

Diagnosis of LBIST or WRPT through Conversion to Stored Patterns

IP.com Disclosure Number: IPCOM000122815D
Original Publication Date: 1998-Jan-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 100K

Publishing Venue

IBM

Related People

Barcomb, KJ: AUTHOR [+6]

Abstract

Disclosed is a method for converting the failing portion of a manufacturing test applied to a Logic device via on-chip Logic Built-In Self Test (LBIST) or on-tester Weighted Random Pattern Test (WRPT) to equivalent stored pattern tests to be applied via a tester. These equivalent stored patterns will contain both the inputs to be applied to the device to create the same internal states as the LBIST or WRPT test would and the values expected to be observed at the outputs of the device as a result of that test. In this way, the exact behavior of the device can be observed and diagnosed.

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Diagnosis of LBIST or WRPT through Conversion to Stored Patterns

      Disclosed is a method for converting the failing portion of a
manufacturing test applied to a Logic device via on-chip Logic
Built-In Self Test (LBIST) or on-tester Weighted Random Pattern Test
(WRPT) to equivalent stored pattern tests to be applied via a tester.
These equivalent stored patterns will contain both the inputs to be
applied to the device to create the same internal states as the LBIST
or WRPT test would and the values expected to be observed at the
outputs of the device as a result of that test.  In this way, the
exact behavior of the device can be observed and diagnosed.

      In a traditional, stored pattern, Level Sensitive Scan Design
(LSSD) test, the final values of all scannable latches can be
observed via a scan-out operation.  These final values can be used in
conjunction with fault simulation to determine possible causes of the
faulty behavior.

      Methods of reducing Test time, or test data volume, such as
LBIST or WRPT, typically present to the tester only a compressed
signature representative of the results of the test to use to verify
proper operation of the device.  The data contained in this signature
is insufficient for diagnostic use.

      IBM designed logic parts that incorporate LBIST or WRPT can
typically be tested in various "modes".  These modes usually include
stored pattern deterministic test, WRPT, LBIST, and others.  It is a
prerequisite of the disclosed method that the devices being tested
contain certain design for test features.  The devices should be
designed such that the same scan latches that are loaded and observed
by the LBIST circuitry on the device in the LBIST test mode or by the

WRPT circuitry on the tester in WRPT mode can, in another test mode,
be loaded and observed directly from the tester as stored patterns.

      Given such design for test features, one solution to the above
described problem is to create a deterministic test that will apply
the same test patterns to a device as the LBIST test would but be
applicable using the stored pattern test mode.  In this way, a
traditional stored pattern scan out operation can be used to extract
the final values of all the latches and compare them to expected
values of those same latches to determine which latches failed
(mismatched).   This fail information and the newly created stored
pattern test can be used with traditional stored pattern diagnostic
tools to identify potential faults in the device that could create
the observed behavior.

Assuming the original LBIST pattern set performed a test like this:
  o  Establish the LBIST test mode in the device.
  o  Initialize the on device Pseudo Random Pattern Generator
      (PRPG) and Multiple Input Shift Register (MISR).
 ...