Browse Prior Art Database

The (2,16,2) Code

IP.com Disclosure Number: IPCOM000122857D
Original Publication Date: 1998-Jan-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 6 page(s) / 116K

Publishing Venue

IBM

Related People

Ashley, J: AUTHOR [+4]

Abstract

Disclosed is a new multiple-spaced,runlength-limited code with parameters(d,k,s)=(2,16,2) and rate 2/5. The maximum possible rate of a (2,16,2)-constrained code is approximately 0.40274, so the disclosed code is over 99% efficient. The code can be used in magneto-optic recording systems incorporating direct overwrite based upon the resonant bias coil technique (1). It is also applicable to magnetic recording systems where runlengh-limited (RLL) (d,k) codes are used. The even zero-runlength property of the (2,16,2) code leads to a wider detection window compared to standard RLL codes, such as (1,7) and (2,7) codes. This property can translate into improved channel performance.

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The (2,16,2) Code

      Disclosed is a new multiple-spaced,runlength-limited code with
parameters(d,k,s)=(2,16,2) and rate 2/5.  The maximum possible rate
of a (2,16,2)-constrained code is approximately 0.40274, so the
disclosed code is over 99% efficient.  The code can be used in
magneto-optic recording systems incorporating direct overwrite based
upon the resonant  bias coil technique (1).  It is also applicable to
magnetic recording systems where runlengh-limited (RLL) (d,k) codes
are used.  The even zero-runlength property of the (2,16,2) code
leads to a wider detection  window compared to standard RLL codes,
such as (1,7) and (2,7) codes.  This property can translate into
improved channel performance.

      The (2,16,2) encoder can be embodied in a finite-state machine
with 23 states, as shown in the Table.  The state information can be
stored in 5 bits.  From the current state information and the 2-bit
input data, the encoder generates a 5-bit codeword and a 5-bit next
state value.  The encoder functions can be easily implemented in a
ROM-based circuit or in Boolean logic.  It should be noted that there
are many acceptable assignments of 5-bit patterns to designate the
encoder states and of 2-bit input data patterns to the codewords at
each state, and this invention should not be considered to be limited
in scope to the particular embodiment shown in Table I.

      The (2,16,2) decoder takes the form of a sliding block
decoder.  The decoder d...