Browse Prior Art Database

Releasing Personal Computer Read Only Memory Address Space

IP.com Disclosure Number: IPCOM000122900D
Original Publication Date: 1998-Jan-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Orr, FM: AUTHOR

Abstract

In current PC architecture 128K of address space is designated for adapter option ROM (0xc0000-0xdffff). Of this 32K is always taken by video ROM, leaving 96K for other system devices and adapter cards. This can restrict the address space available to other devices.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 62% of the total text.

Releasing Personal Computer Read Only Memory Address Space

      In current PC architecture 128K of address space is designated
for adapter option ROM (0xc0000-0xdffff).  Of this 32K is always
taken by video ROM, leaving 96K for other system devices and adapter
cards.  This can restrict the address space available to other
devices.

During power on self test (POST) the relevant part of the system map
looks like this:
  1.  0xc0000 - 0xc7fff - video code    32K needed after boot
  2.  0xc8000 - 0xdffff - adapter code space  96K needed after boot
  3.  0xe0000 - 0xeffff - POST code     64K not needed after boot
  4.  0xf0000 - 0xfffff - BIOS code     64K needed after boot

      Currently, over half of region 2 can be taken up by planar
devices, severely restricting the possibilities of adding adapters.
The improvement described here utilizes region 3 (whose code is not
needed after operating system boot) for these planar devices, thus
freeing up  all of region 2 for adapters.

In order to do this the following steps are taken:
  a) POST code is temporarily copied to another area of
      system memory map.
  b) Execution control is transferred to the temporary area.
  c) Planar device ROM code is unpacked/shadowed to shadow RAM in
      region 3 or to a suitable area in region 2.  Note that POST
      code is not in region 3 at the moment, so no conflict occurs.
  d) Planar device initialization code is run from region 3.
  e...