Browse Prior Art Database

Watchdog Timer in Power-Management System

IP.com Disclosure Number: IPCOM000122973D
Original Publication Date: 1998-Jan-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Miwa, Y: AUTHOR

Abstract

Disclosed is a system that changes a cycle of a watchdog timer when detected power saving mode by watching power consumption.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Watchdog Timer in Power-Management System

      Disclosed is a system that changes a cycle of a watchdog timer
when detected power saving mode by watching power consumption.

      Most conventional power-management systems do not change a
cycle of a watchdog timer in a power saving mode.  It also requires
Input/Output (I/O) access in the same cycle as normal operation.
Actually, it is hard to make use of the power saving mode.  It might
be possible to change a cycle of watchdog timer to use  a power
saving mode by modifying software, but developing such software
needs many efforts because a power saving mode has to be detected.

      The system makes I/O access cycle longer than normal operation
by prolongation of a watchdog timer which enables utilization of the
power saving mode more effectively without modifying software.  This
method attaches in the system some circuit, a hardware whose function
is to watch current in the Central Processing Unit (CPU) (or in the
system as well) and to make the watchdog timer cycle longer under
certain levels of current.

The general concept is shown in the Figure.