Browse Prior Art Database

Early mode padding for Multifunction Hard Core Macro

IP.com Disclosure Number: IPCOM000122996D
Original Publication Date: 1998-Mar-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 1 page(s) / 57K

Publishing Venue

IBM

Related People

Hieter, N: AUTHOR [+3]

Abstract

Disclosed is a method for use with synthesis tools for solving early mode problems in the implementation of multifunction HARD CORE macros such as the one for interfacing a PCI bus. The method results in padding the critical paths in the HARD CORE implementaion.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 54% of the total text.

Early mode padding for Multifunction Hard Core Macro

      Disclosed is a method for use with synthesis tools for solving
early mode problems in the implementation of multifunction HARD CORE
macros such as the one for interfacing a PCI bus.  The method results
in padding the critical paths in the HARD CORE implementaion.

Multifunction Hard CORE macro is defined as a set of chiplets which
serve a specific function according to the user requirement.  The
Hard CORE macro is implemented within the ASIC technology library as
one of  the provided cells.  This CORE must meet all the timing
requirements such as setup or hold time criteria.  The CORE
configuration is chosen by  the user, but the chiplets combination
must meet the timing requirements  with all the possible
configuration.  In a typical CORE structure, the  ENGINE is the
central chiplet which contains the clock generation unit.  All the
chiplets may contain separate clock trees.  Internal latches are
spread between the various chiplets.

Early mode problems are usually to occur on paths connecting PCI
inputs to internal latches.  Also signals which are connected between
chiplets and are based on combinatorial logic of the PCI inputs may
have early mode problems too.  Assuming that the ENGINE is the only
chiplet which is required in all the possible configuration, the
early mode paths should be solved for any chosen configuration.  The
impact of a chiplet connected to the ENGINE is increased loading on
...