Browse Prior Art Database

Self Align Patterning Method

IP.com Disclosure Number: IPCOM000123068D
Original Publication Date: 1998-May-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 85K

Publishing Venue

IBM

Related People

Tsujimura, T: AUTHOR [+3]

Abstract

Disclosed is a method to make transparent electrode of TFT-LCD (Thin Film Transistor-Liquid Crystal Display) array using UV (Ultraviolet) exposure from the backside of the substrate to negative resist. Photo mask is used to conceal the peripheral blank space. As this method enables the very precise alignment of transparent electrode to the data line and to the gate line, wide aperture ratio can be obtained. As the peripheral area is not exposed because of the photo mask, extra step to remove peripheral space can be reduced.

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Self Align Patterning Method

   Disclosed is a method to make transparent electrode of
TFT-LCD (Thin Film Transistor-Liquid Crystal Display) array using UV
(Ultraviolet) exposure from the backside of the substrate to negative
resist.  Photo mask is used to conceal the peripheral blank space.
As this method enables the very precise alignment of transparent
electrode to the data line and to the gate line, wide aperture ratio
can be obtained.  As the peripheral area is not exposed because of
the photo mask, extra step to remove peripheral space can be reduced.

   Fig. 1 shows the back-side exposure using photo mask to
make pixel electrode image of negative resist.  As peripheral area is
not exposed to UV light, no additional photo process to remove
peripheral spacing area is not needed.  ITO (Indium Tin Oxide) near
the TFT that causes lateral field to make disclination line can also
be removed using photo mask.

   Fig. 2 shows the self alignment method to make ITO
pattern.  After making TFT and data line, insulator is deposited.
Said insulator is made of silicon nitride, silicon oxide, SOG (Spin
on Glass) film, carbon, germanium compound, polyimide, polymer or the
colored polymer.  ITO (or other transparent metal) is deposited by
sputtering and then negative resist is coated by spin coater.  UV
Light is exposed from the back side (Fig. 2-1) and negative resist is
cross-linked after baking.  After developing in the developer rinse
(Fig. 2-2), ITO etching is perform...