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Manufacturing Method of Self-Aligned Thin Film Transistor

IP.com Disclosure Number: IPCOM000123114D
Original Publication Date: 1998-May-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 72K

Publishing Venue

IBM

Related People

Hayashi, Y: AUTHOR [+2]

Abstract

Disclosed is a manufacturing method of thin film transistor with its electrodes completely self-aligned to each other, which utilizes the surface planarizing nature of photo-resist materials. This method realizes to fabricate thin film transistors which are smaller in sizes without requiring higher alignment accuracy on photo-lithography tools.

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Manufacturing Method of Self-Aligned Thin Film Transistor

   Disclosed is a manufacturing method of thin film
transistor with its electrodes completely self-aligned to each other,
which utilizes the surface planarizing nature of photo-resist
materials.  This method realizes to fabricate thin film transistors
which are smaller in sizes without requiring higher alignment
accuracy on photo-lithography tools.

   After forming gate electrode on substrate, insulator,
silicon and 2nd insulator layer are deposited.  Then 2nd insulator
layer is patterned by photo-lithography and etching, applying light
exposure from the back side of the substrate during photo-lithography
step (Fig.1).  After doped silicon layer is deposited on the surface,
photo-resist material is coated.  .sp 1

   This photo-resist layer is etched certain amount of
thickness so that the only the part of doped silicon layer on top of
2nd insulator layer is exposed (Fig.2).  Then silicon etching is
applied and photo-resist is stripped off.  Two electrodes are formed,
afterward (Fig. 3).

   In this structure, doped silicon layer acts as source
and drain electrodes.  And as the relative positions between these
electrodes and gate electrode are not determined by the alignment of
exposure tool but self-alignment, there is no need to concern about
the errors of alignment in exposure tool.  This enables to fabricate
thin film transistors with smaller in sizes, which has been
impossible due to the limitations...