Browse Prior Art Database

Pixel Design for Thin Film Transistor/ Liquid Crystal Display

IP.com Disclosure Number: IPCOM000123186D
Original Publication Date: 1998-Jun-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Arai, T: AUTHOR [+4]

Abstract

Disclosed is a Thin Film Transistor (TFT) structure with storage capacitor(Cs) which is fabricated between gate line and buried pixel electrode under an Cs insulator film.

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Pixel Design for Thin Film Transistor/ Liquid Crystal Display

   Disclosed is a Thin Film Transistor (TFT) structure with
storage capacitor(Cs) which is fabricated between gate line and
buried pixel electrode under an Cs insulator film.

   The proposed design is compared with the conventional
design in Fig. 1.  In the latter, Cs which is necessary to reduce
the unfavorable effects of the parasitic capacitance of TFT (Cgs),
is a sandwich of gate line and pixel electrode with a middle layer
of gate insulator.

   Therefore, to increase the Cs capacitance without changing
Cgs, it is necessary to enlarge the overlapping region between gate
line and pixel electrode.  If the width of gate line is widened to
enlarge the overlapping region, the aperture rario is decreased.
Furthermore, since the pixel electrode and signal lines are installed
on the same plane, they are easily shorted, if the etching residues
remain.

   On the other hand, in the novel structure, Cs is a sandwich
of pixel electrode and gate line with a middle layer of Cs
insulator.

   Because the Cs insulator is independent of the gate
insulator, it is easy to increase the Cs capacitance without
changing Cgs by decreasing the thickness of the Cs insulator film.

   Using this structure, it is possible to obtain sufficient
capacitance of Cs for reducing the unfavorable effects of Cgs
without decreasing aperture ratio.  Furthermore, short circuits
between pixel electrode and signal lines are eliminated,beca...