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Calculation method of DRAM Reparability

IP.com Disclosure Number: IPCOM000123373D
Original Publication Date: 1998-Oct-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 2 page(s) / 63K

IBM

Satoh, K: AUTHOR

Abstract

Disclosed is a calculation method for reparability on DRAM, Dynamic Random Access Memory, with a redundancy architecture. It is the first calculation method that contains defect size distribution and is applicable for any redundancy architecture, mathematically derived with statistics. It allows DRAM circuit designers to determine the best redundancy architecture. It also helps DRAM yield analysts accurate yield modeling and yield forecasting.

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Calculation method of DRAM Reparability

Disclosed is a calculation method for reparability on DRAM,
Dynamic Random Access Memory, with a redundancy architecture.  It is
the first calculation method that contains defect size distribution
and is  applicable for any redundancy architecture, mathematically
derived with statistics.  It allows DRAM circuit designers to
determine the best redundancy architecture.  It also helps DRAM yield
analysts accurate yield modeling and yield forecasting.

A DRAM chip with limited number of defects on the memory
cell array can be fixed by replacing defect-on-cells with redundancy
units.  On the other hand, more defects than redundancy units or huge
defects cannot be replaced.  The reparability therefore can be
formulated as a probability function of defect density and defect
size.

Assuming defect size distribution proportional to inverse
cube of defect size ( = r-3 ) as observed in a semiconductor
production line, a probability R of fixing k defects on a redundancy
architecture defined area is derived as
where m replace units are in the defined area and one replace unit
has n redundant lines.  While a probability P of finding k defects in
the area is given by
, where Gamma(x), a and d are Gamma function, cluster factor and
defect density, we have an expression of reparability Yfix for the
system summing up k from o to m,

Reduced defect density after fuse repair is expressed by

Redundancy architecture is sep...