Browse Prior Art Database

Delay Matching Element for Differential Receiver

IP.com Disclosure Number: IPCOM000123535D
Original Publication Date: 1999-Jan-01
Included in the Prior Art Database: 2005-Apr-05
Document File: 3 page(s) / 58K

Publishing Venue

IBM

Related People

Nguyen, TC: AUTHOR [+3]

Abstract

A typical CMOS differential receiver circuit is shown in Fig. 1. The use of this type of circuit is becoming increasingly important as microprocessor speeds and the rate of exchange between microprocessors and memory increases into the hundred of megahertz and beyond a gigahertz. One issue that arises when using these circuits on silicon chips is that it is usually true that the performance of the chip can be increased if the differential receiver circuit delay tracks that of the corresponding logic delay on the silicon chip. This is usually difficult to achieve due to the analog topology of the differential receiver.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Delay Matching Element for Differential Receiver

   A typical CMOS differential receiver circuit is shown in
Fig. 1.  The use of this type of circuit is becoming increasingly
important as microprocessor speeds and the rate of exchange between
microprocessors and memory increases into the hundred of megahertz
and beyond a gigahertz.  One issue that arises when using these
circuits on silicon chips is that it is usually true that the
performance of the chip can be increased if the differential receiver
circuit delay tracks that of the corresponding logic delay on the
silicon chip.  This is usually difficult to achieve due to the analog
topology of the differential receiver.

   The circuit shown in Fig. 2 can be used to track
the differential receiver.  The topology shown is for an
inverter/buffer, but the idea can be extended to other logic
functions as well.  The improved delay tracking to the differential
receiver is achieved by stacking the first two inverting stages.  The
stacking of the logic circuit approximates the stacked nature of the
differential receiver.  This differential receiver tracking circuit
has been shown to have significant improvement over simple
inverting stages in tracking the differential receiver over process,
temperature, and power supply variations.