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Integrating a High- Dielectric as the Gate Oxide of a Silicon MOS Capacitor-Based Optical Modulator

IP.com Disclosure Number: IPCOM000124953D
Publication Date: 2005-May-13

Publishing Venue

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Abstract

Disclosed is a method for a silicon-based electro-optic modulator with a high- dielectric in the gate stack, to obtain high modulation speeds at low drive voltages. Benefits include reducing oxide thickness without increasing oxide leakage current.

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Integrating a High-k  Dielectric as the Gate Oxide of a Silicon MOS Capacitor-Based Optical Modulator

Disclosed is a method for a silicon-based electro-optic modulator with a high-k dielectric in the gate stack, to obtain high modulation speeds at low drive voltages. Benefits include reducing oxide thickness without increasing oxide leakage current.

Background

There is a need to create a silicon MOS capacitor based, high-speed optical modulator with a low operating voltage and reduced on-chip optical power loss. Current Si MOS capacitor-based optical modulators (see Figure 1a) are capable of approximately 1GHz modulation speeds, but have high operating voltages (see Figure 1b). This is quantified by VpL ~ 8 V.cm, where Vp is the drive voltage swing required to induce a phase change of p in a modulator of length L.

Silicon-based optical modulators use phase modulations of the incident optical beam in a Mach-Zehnder interferometer (MZI) geometry. The phase modulation is obtained through the plasma dispersion effect, (i.e. a change in the refractive index with a change in the carrier concentration). Past silicon-based modulators have used carrier density enhancements in a forward biased p-i-n diode. The speed of these modulators is limited to about 20 MHz due to the large minority carrier lifetime. Recently, a MOS-capacitor based optical modulator has shown that the carrier density change is induced by accumulating the MOS capacitor (see Figure 1). This modulator, a majority carrier device, had a modulation speed of ~ 1 GHz. The voltage required to induce a phase change of p was Vp ~ 8 V for modulator length L = 1 cm (VpL ~ 8 V.cm). The modulator also had an on-chip loss of ~ 6.7 dB/cm.

General Description

The disclosed method creates a MOS capacitor-based modulator with a lower Vp, lower on-chip loss, and lower device capacitance C; it scales the device dimensions (length L and width W) as well as the equivalent gate oxide thickness toxe. The Vp of the modulator is given by:

,

where k0 depends on the operating wavelength l, overlap of the refractive index change with the optical beam profile, and electron and hole plasma dispersion coefficients that relate the refractive index change induced by the carrier density change. The total device capacitance is given by:

,

where eox is the permittivity of SiO2. Therefore, the scaling strategy should be:

§         reduce L to lower on-chip loss

§         reduce toxe by using high-K dielectric by at least the L reduction factor to keep Vp constant or further reduce toxe to lower Vp

§         reduce W by at least the Vp reduction factor to keep C constant, or further reduce W to decrease C.

Modulator structures that integrate a high-k dielectric as the gate oxide of the MOS capacitor are shown in Figure 2. The reduction of toxe without any increase in oxide leakage current is enabled by the use of a high-k dielectric. Reducing the width W results in a reduced overlap of the refractive index change with the optical beam profi...