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Method for layout-programmable low-leakage ROM

IP.com Disclosure Number: IPCOM000125113D
Publication Date: 2005-May-19
Document File: 2 page(s) / 41K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for layout-programmable low-leakage read only memory (ROM). Benefits include improved functionality, improved performance, improved power performance, improved ease of implementation, and improved cost effectiveness.

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Method for layout-programmable low-leakage ROM

Disclosed is a method for layout-programmable low-leakage read only memory (ROM). Benefits include improved functionality, improved performance, improved power performance, improved ease of implementation, and improved cost effectiveness.

Background

              High-performance on-chip ROMs are crucial parts of modern microprocessors. Leakage power contributes to an increasing portion of their total power consumption. A conventional circuit for a local bitline in a ROM contains a number, N, of storage cells, which have a value of either “1” or “0”. A “1” is stored if a discharge transistor is present. A “0” is stored if no transistor is present. The bitcells are read when the corresponding wordline is high. The four bit-cell lines are merged into a local bitline by the 4-to-1 column select multiplexer (MUX), assuring that only one of the 4N bitcells is read for each of the M local bitlines (see Figure 1).

              The wordline driver is designed to control a fully populated wordline of 4M storage transistors. However, the data in a ROM can include of a large amount of zeros, making the wordline drivers oversized in most cases (load << 4M). For example, the word length of the stored data M could be 40 bits. A fully populated wordline is designed to drive 160 negative-channel metal oxide semiconductor (nMOS) storage transistors. The actual worst-case population is 54 nMOS transistors. In cases where a bitcell line is not populated, the precharge and column-select devices are not used. However, they contribute to the leakage of the ROM array and the loads of the precharge and column select drivers.

Description

              The disclos...