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Dynamic multi-parameter calibration for output signals

IP.com Disclosure Number: IPCOM000125333D
Original Publication Date: 2005-Jun-20
Included in the Prior Art Database: 2005-Jun-20
Document File: 5 page(s) / 182K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

Existing high data rate chip to chip and board to board interfaces are using OCD (Off Chip Drivers) with very hard requirements for output impedance, slew-rate, and duty cycle in order to keep the signal quality on an acceptable level. To achieve these requirements, the so called OCD calibration is realized in the latest generation of GDRAM (Graphical DRAM) memory chips. The OCD calibration is a dynamical adjustment of the OCD (and also ODT – On Die Termination) impedance to the value of 40 Ohm. This is equal to the characteristic impedance of transmission lines on the PCB and minimizes signal distortions as consequence. An implementation example of state of the art OCD calibration is shown in Fig. 1. The depicted implementation provides only a calibration of the static impedance of the OCD (for both pull up and pull down parts of the OCD) according to the value of the external reference resistor. The resistor is connected to the chip through a separate pin. The working principle is illustrated in Fig 2. A copy of the P-part of the OCD drives continuous voltage corresponding to logical one level against the external grounded reference resistor. The strength of the P-driver changes according to the digital input "P-calibration" till the output voltage reaches the voltage level of VDD/2. The result of P-calibration is applied to another copy of the P-part. This P-part copy drives continuous voltage corresponding logical one level against the N-driver which is in logical zero state. Now, the strength of the N-driver is changed till voltage in the common output node reaches the level VDD/2. After the calibration is finished, resulting calibration data for P and N parts of the driver can be latched in register and distributed to all (4…32 ) OCD in the chip.

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Dynamic multi-parameter calibration for output signals

Idea: Maksim Kuzmenka, DE-Muenchen; Andreas Tuber, DE-Muenchen

Existing high data rate chip to chip and board to board interfaces are using OCD (Off Chip Drivers) with very hard requirements for output impedance, slew-rate, and duty cycle in order to keep the signal quality on an acceptable level. To achieve these requirements, the so called OCD calibration is realized in the latest generation of GDRAM (Graphical DRAM) memory chips. The OCD calibration is a dynamical adjustment of the OCD (and also ODT - On Die Termination) impedance to the value of 40 Ohm. This is equal to the characteristic impedance of transmission lines on the PCB and minimizes signal distortions as consequence. An implementation example of state of the art OCD calibration is shown in Fig. 1. The depicted implementation provides only a calibration of the static impedance of the OCD (for both pull up and pull down parts of the OCD) according to the value of the external reference resistor. The resistor is connected to the chip through a separate pin.

The working principle is illustrated in Fig 2. A copy of the P-part of the OCD drives continuous voltage corresponding to logical one level against the external grounded reference resistor. The strength of the P-driver changes according to the digital input "P-calibration" till the output voltage reaches the voltage level of VDD/2. The result of P-calibration is applied to another copy of the P-part. This P-part copy drives continuous voltage corresponding logical one level against the N-driver which is in logical zero state. Now, the strength of the N-driver is changed till voltage in the common output node reaches the level VDD/2. After the calibration is finished, resulting calibration data for P and N parts of the driver can be latched in register and distributed to all (4...32 ) OCD in the chip.

The disadvantages of the state of the art are:

* OCD copies used for the calibration have some differences with the "normal" OCD. These differences can provoke a calibration error.

* The calibration comprises two steps: P-driver calibration against external resistor and N-driver calibration against internal P-driver copy. Each step can lead to a calibration error. Thus the error occurrence reduplicates.

* The N-driver-calibration does not involve the package to the DC current path - it provides an additional error.

* Such calibration only guarantees stable OCD DC impedance. The dynamical parameters of the OCD output signal like slew rate (SR) and duty cycle are still very strong dependent from the PVT (Process Voltage Technology) variations.

A new method for the OCD calibration is proposed that stabilizes the OCD impedance in more accurate way. In addition, this method stabilizes the OCD slew rate and the duty cycle without adding extra pins to the chip. A possible architecture of the proposed method is shown in Fig. 3.

Fig. 4 shows a possible impedance calibrati...