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Variable Reference Voltage Distribution Featuring Accurate Receiver Ground Sensing

IP.com Disclosure Number: IPCOM000125365D
Original Publication Date: 2005-Jun-20
Included in the Prior Art Database: 2005-Jun-20
Document File: 7 page(s) / 160K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

In complex mixed-signal transceiver chips a central bias circuit generates a primary reference voltage that is then distributed to the various signal-processing blocks. Data converters, for example, need a reference voltage that defines their full-scale range. In multi-channel applications the converter reference is generated locally out of a centrally generated reference voltage. Sometimes, a close tracking between the full-scale ranges of different channels is required. In other applications the reference voltage is made programmable. In almost all cases, though, the converter reference has to be very accurate, which means it must be closely tracking the primary reference voltage. Another example is the common-mode voltage required for fully differential operational amplifiers, the key building block of analog signal processing blocks. To maximize the dynamic range of the analog circuits the common-mode voltage has to be kept within a certain window. This window is becoming smaller in advanced technologies, such that the distribution of a centrally generated reference voltage in a large mixed-signal, possibly multi-channel, chip is not trivial any more. The problem can be reduced to the situation shown in figure 1. The central bias circuit is represented by the block labeled "Bandgap", which generates the primary reference voltage vREF, referenced to ground node 0. The variable amplifier "G", still residing in the central bias circuit and referenced to the same ground potential (0) provides the voltage vDIST=G∙vREF, which is then distributed to the signal processing block labeled "Receiver". In general the reference ground of the "Receiver" is given by vGND≠0, such that the effective reference voltage vREF1, seen by the "Receiver", is given by

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Variable Reference Voltage Distribution Featuring Accurate Receiver Ground Sensing

Idea: Martin Clara, AT-Villach; Wolfgang Klatzer, AT-Villach

In complex mixed-signal transceiver chips a central bias circuit generates a primary reference voltage that is then distributed to the various signal-processing blocks. Data converters, for example, need a reference voltage that defines their full-scale range. In multi-channel applications the converter reference is generated locally out of a centrally generated reference voltage. Sometimes, a close tracking between the full-scale ranges of different channels is required. In other applications the reference voltage is made programmable. In almost all cases, though, the converter reference has to be very accurate, which means it must be closely tracking the primary reference voltage.

Another example is the common-mode voltage required for fully differential operational amplifiers, the key building block of analog signal processing blocks. To maximize the dynamic range of the analog circuits the common-mode voltage has to be kept within a certain window. This window is becoming smaller in advanced technologies, such that the distribution of a centrally generated reference voltage in a large mixed-signal, possibly multi-channel, chip is not trivial any more.

The problem can be reduced to the situation shown in figure 1. The central bias circuit is represented by the block labeled "Bandgap", which generates the primary reference voltage vREF, referenced to ground node 0. The variable amplifier "G", still residing in the central bias circuit and referenced to the same ground potential (0) provides the voltage vDIST=G·vREF, which is then distributed to the signal processing block labeled "Receiver". In general the reference ground of the "Receiver" is given by vGND≠0, such that the effective reference voltage vREF1, seen by the "Receiver", is given by

                             GND REF GND DIST REF v v G v

v -

=

           1 (1) vGND is equal to the difference in voltage drop on the VSS-rails (Voltage Source - Source) between central bias circuit and "Receiver"-circuit. In large mixed signal chips the VSS-rails are sometimes not even connected on-chip, such that also the different voltage drop on the bonding wires, pins and PCB- tracks (Printed Circuit Board) up to the external ground connection has to be taken into account. In a practical situation, the central bias circuit is relatively low power as compared to the "Receiver" circuit, such that vGND can easily add up to several tens of millivolts.

The standard solution, especially in multi-channel transceivers, is the distribution of a reference current derived from the primary reference voltage. The "Receiver" circuit then locally regenerates a copy of the primary reference voltage and derives all the required bias voltages. Current distribution and local regeneration of the primary reference voltage does not suffer from differences in the ground potential between central bi...