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MRAM Cell with Domain Wall Switching and Field Select

IP.com Disclosure Number: IPCOM000125701D
Original Publication Date: 2005-Jul-10
Included in the Prior Art Database: 2005-Jul-10
Document File: 1 page(s) / 28K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

The problem is that in memory cells of a certain technology the value that represents the zero or one state can potentially degrade over time. An example for such a technology would be an MRAM (Magnetic Random Access Memory), in which the cells are based on domain wall movement. The method of using error correction or a refresh operation also applies to any other memory using different resistance states for 0 and 1, and which has error mechanisms, which lead to intermediate resistance values. Up to now, there is used conventional error correction, which checks MRAM cells for 0 and 1, calculates check sums, and uses additional memory cells for redundant information. A refresh operation for MRAMs is not part of the prior art. The idea is to use an error correction that uses continuously changing cell resistance to detect a change of value which resembles the digital information that is stored. The implementations to handle this are the following: • Implementation 1: This idea solves the problem by monitoring on a regular basis the resistances that reassemble the states of the cell. For the cell in which a significant resistance change was detected, the original information is written back into the memory cell. • Implementation 2: Like during DRAM (Dynamic Random Access Memory) refresh operation, on a regular basis, the originally stored information is written back into the MRAM memory cell, based on domain wall movement. • Implementation 3: Like in a Flash memory, there are additional error correction bits on the memory that are used for ECC (Error Checking and Correcting). If data is read from the memory, an active error correction operation is performed.

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MRAM Cell with Domain Wall Switching and Field Select

Idea: Dr. Daniel Braun, FR-Paris; Dr. Gerhard Mueller, DE-Munich

The problem is that in memory cells of a certain technology the value that represents the zero or one state can potentially degrade over time. An example for such a technology would be an MRAM (Magnetic Random Access Memory), in which the cells are based on domain wall movement. The method of using error correction or a refresh operation also applies to any other memory using different resistance states for 0 and 1, and which has error mechanisms, which lead to intermediate resistance values. Up to now, there is used conventional error correction, which checks MRAM cells for 0 and 1, calculates check sums, and uses additional memory cells for redundant information. A refresh operation for MRAMs is not part of the prior art.

The idea is to use an error correction that uses continuously changing cell resistance to detect a change of value which resembles the digital information that is stored.

The implementations to handle this are the following:

* Implementation 1: This idea solves the problem by monitoring on a regular basis the resistances that reassemble the states of the cell. For the cell in which a significant resistance change was detected, the original information is written back into the memory cell.

* Implementation 2: Like during DRAM (Dynamic Random Access Memory) refresh operation, on a regular basis, the originally stored information is written back into the MRAM memory cell, based on domai...