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Method for a split queue to improve transmit latency

IP.com Disclosure Number: IPCOM000125744D
Publication Date: 2005-Jun-15
Document File: 3 page(s) / 176K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a split queue to improve transmit latency. Benefits include improved functionality and improved performance

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Method for a split queue to improve transmit latency

Disclosed is a method for a split queue to improve transmit latency. Benefits include improved functionality and improved performance.

Background

              Conventional input/output (I/O) devices with direct memory access (DMA) capabilities have a descriptor queue (ring) interface. The descriptor ring typically resides in main memory. Software that is executed by the central processor unit (CPU) performs the following steps:

1.           Device driver writes a descriptor into the ring with parameters describing the address of the payload data and the operations to be performed on the data.

2.           Device driver performs an uncacheable (UC) write operation (doorbell).

3.           Device driver retrieves the I/O device’s descriptor from the ring.

4.           I/O device decodes the descriptor and accesses the payload, performing the operations described in the descriptor.

5.           I/O device signals completion.

              High speed I/O device interfaces, such as networking and storage I/O, conventionally operate on the following basic principles:

•             Descriptors that are written once are never accessed again until after the I/O device has finished processing them.

•             Payload buffers embedded in descriptors are not touched until after the I/O device has finished processing the corresponding descriptor.

•             Payload buffers created by applications are allocated from write-back memory.

              A single queue architecture can result in head-of-line blocking issues that reduce performance.

Description

              The disclosed method is a split queue to improve transmit latency. The method creates separate inbound and outbound queues that reside in different physical domains, system memory, and device memory (see Figure 1).

              The interactions between system software running on the CPU and the I/O device are modified as follows (see Figure 2):...