Browse Prior Art Database

High Aspect Ratio Flexible Central Electronics Complex (CEC) Interconnect

IP.com Disclosure Number: IPCOM000126921D
Original Publication Date: 2005-Aug-10
Included in the Prior Art Database: 2005-Aug-10
Document File: 2 page(s) / 75K

Publishing Venue

IBM

Abstract

Disclosed is a method for utilizing a flexible circuit construct mated to very high density medium (VHDM) connectors in order to provide high density IO paths between processors in multi-node systems.

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High Aspect Ratio Flexible Central Electronics Complex (CEC) Interconnect

High density interconnect between processing units located in separate physical packages is enabled by utilizing a flexible circuit mated to very high density medium (VHDM) connector. This provides high density IO paths between processors in multi-node systems. The processors do not reside on the same printed circuit board nor are they within the same physical package. Separate processing entities reside on different printed circuit boards within stand-alone packages but they can share processing bandwidth through high-speed signaling between processors within different physical packages. This solution meets mechanical flexibility and physical size requirements while providing excellent signal quality and the opportunity for system timing adjustments.

     Integral latching/docking mechanisms for VHDM connections are utilized. This solution allows for individual processing node servicing capability without disturbing any other nodes within the system (i.e., concurrent maintenance).

The flexible circuit connects IO cells of different processors within stand-alone subsystems. VHDM connections are integrated in order to allow high-density, high-speed electrical connections. The problem of ground reference (level) variation between subsystems using separate power supplies is eliminated through a common ground in the flex. Ground stitching vias are located throughout the length of the circuit such th...