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An alternative to thick strained Si-on-insulator: structure and method of making

IP.com Disclosure Number: IPCOM000127312D
Original Publication Date: 2005-Aug-22
Included in the Prior Art Database: 2005-Aug-22
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Abstract

Disclosed is a silicon-on-insulator (SOI) substrate in which the SOI is a bilayer comprising an upper layer of strained silicon and a lower layer of nominally relaxed silicon.

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An alternative to thick strained Si -on-insulator: structure and method of making

Disclosed is a silicon-on-insulator (SOI) substrate in which the SOI is a bilayer comprising an upper layer of strained silicon and a lower layer of nominally relaxed silicon. Such substrates make it possible to utilize circuit designs in which the total SOI thickness is thicker than the strained Si layer thickness. This is particularly useful for partially depleted SOI (PDSOI) complementary metal oxide semiconductor (CMOS) device technology, where the total thickness desired for the SOI layer would typically exceed the critical thickness of the strained Si layer (i.e., the thickness above which the strained Si starts becoming defective due to the spontaneous formation of strain-relieving dislocations [1]). These new substrates thus make it possible for the circuit's field effect transistors to have the benefits of strained Si in their channel regions, but the benefits of a thicker SOI layer in their source/drain regions.

These substrates provide additional advantages for cases in which the strained Si layer is patterned into islands, since some strain is always lost at the island edges. The magnitude of this effect depends on the islands' width-to-thickness ratio, with some models [2] showing that more than half the strain may be lost from the center of the islands for width-to-thickness ratios below 4. With the disclosed substrates, strain loss at the island edges will scale with the strained Si thickness rather than the larger SOI island thickness.

A schematic of the disclosed substrate structure is shown in FIG. 1. SOI substrate 10 comprises base substrate 20 (typically a semiconductor such as Si), buried oxide or insulator layer 30, nominally relaxed Si layer 40, and strained Si layer 50. Strained Si layer 50 would preferably have a thickness below the critical thickness as defined by Matthews and Blakeslee [1]. The total SOI thickness of SOI substrate 10 is the sum of the thicknesses of strained Si layer 50 and nominally relaxed Si layer 40.

The disclosed substrate structure may be fabricated by the following steps, illustrated in FIG. 2:

Select a SOI substrate comprising a base substrate 20, a buried oxide or insulator layer 30, and a nom...