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A Method for Direct Memory Access (DMA)

IP.com Disclosure Number: IPCOM000127437D
Publication Date: 2005-Aug-30
Document File: 5 page(s) / 59K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for performing Direct Memory Access (DMA) operations without affecting the CPU’s bus access. Benefits include improved CPU availability for applications and improved overall system performance.

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A Method for Direct Memory Access (DMA)

Disclosed is a method for performing Direct Memory Access (DMA) operations without affecting the CPU’s bus access. Benefits include improved CPU availability for applications and improved overall system performance.

Background

In platforms such as server boards, a large volume of data can be stored/retrieved very frequently. During continuous bulk data transfers, with conventional DMA, the Central Processing Unit (CPU) cannot perform up to its fullest capacity due to the distraction of its bus access to use the RAM. In these situations, the performance of the CPU is limited to its instruction caching/pipelining capabilities. In such platforms, due to this frequent bus arbitration, the CPU’s idle time eventually becomes directly proportional to the amount and contiguity of bulk data transfers. The result is the poor utilization of the costly and highly capable server processor, which in turn will affect the availability of the server.

General Description

The disclosed method is Co-operative Direct Memory Access (C-DMA). It improves CPU availability and performance during continuous bulk data transfers. The method applies to environments such as the following:


•             Media servers

•             Storage servers

•             Large enterprise servers

•             Public access network servers

The C-DMA architecture can be extended to support multiprocessor boards with multi-channel DMA controllers supporting several peripherals.

The key elements of the method include:

§         Sharing of Dual-port Synchronous Dynamic Random Access Memory (SDRAM) or a similar shared RAM by the CPU and the DMA controller.

§         Configurable Roaming DMA window (RDW) that provides access for the DMA controller to the SDRAM

§         DMA Control Region (DCR) that contains shared SDRAM configuration and status information

§         DMA Window lock Flag (DWF)

§         DMA Control region lock Fag (DCF)

Advantages

The disclosed method provides advantages, including:

§         Improved performance due to enabling the complete and parallel availability of the CPU for other applications during continuous DMA transfer.

§         Improved performance in platforms having a high rate of multiple peripheral access through DMA.

§         Improved overall availability of the server for its clients.

§         Improved inter-controller communication between the CPU and the DMA controller, because of the use of Command Byte Technique.

Detailed description

The disclosed method is Co-operative Direct Memory Access (C-DMA). The CPU and the DMA Controller are connected to the shared RAM and can access it simultaneously (see Figure 1).

The DMA controller accesses only a pre-defined window in the RAM as directed by the CPU. This window is not static. It can roam across different regions in the RAM as programmed by the CPU on the fly. As a result, the window is a roaming DMA window (RDW). It is configured in a pair of CPU Roaming Window Registers (RWRs), which point to the top and bottom of the windo...