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Method for a self-biased micropower CMOS linear voltage regulator using a band-gap reference generator

IP.com Disclosure Number: IPCOM000127644D
Publication Date: 2005-Sep-07
Document File: 5 page(s) / 74K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a self-biased micropower complementary metal oxide semiconductor (CMOS) linear voltage regulator using a band-gap reference generator. Benefits include improved functionality and improved performance.

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Method for a self-biased micropower CMOS linear voltage regulator using a band-gap reference generator

Disclosed is a method for a self-biased micropower complementary metal oxide semiconductor (CMOS) linear voltage regulator using a band-gap reference generator. Benefits include improved functionality and improved performance.

Background

              Conventional circuits typically use a band-gap reference circuit that produces about 1.25V reference with relatively low temperature coefficient unless process parameters of the bipolar transistors can be adjusted to give a lower reference level. The 1.25V is attenuated to 1.15V which is used to drive the regulator load, by using a buffer output amplifier.

      A conventional general-purpose voltage regulator produces an output that is defined as:

VREGOUT = VREF x (R2/(R1+R2 )) x (1+R3/R4) + Vos x (1+ R3/R4)

      The value of Vos is the input referred offset of the amplifier OA1 (see Figure 1).

      The opamp OA1 is designed to drive the load with the specified voltage and current. The voltage regulator is typically formed by a single stage opamp with its output stage consisting of a PMOS device, if the output is expected to source the load current. The PMOS output transistor maintains the output voltage very close to the VCC supply rail.

      Many conventional regulator circuits use self-bias techniques for the band-gap circuit as well as for the output amplifier. Additionally, biasing OA1 using the VREF is common. However, the area of the circuit being consumed by the biasing network used for the self-bias scheme must be reduced.

General description

      The disclosed method is a self-biased micropower CMOS linear voltage regulator using a band-gap reference generator. The method includes a guaranteed start-up circuit that is implemented in a standard digital CMOS circuit. It is implemented using 3-V transistors in a 0.13-µ process with inductance (L) greater than 2µ. The result is a small regulator of less than 0.082µ2. The operating current varies between 1.1µA and 4.2µA, depending on testing conditions, and is very low current. The line regulation is within a millivolt of a typical circuit.

Advantages

The disclosed method provides advantages, including:
•             Improved functionality due to providing a very small voltage regulator of less than 0.082µ2
•             Improved functionality due to providing a voltage regulator with an operating current that varies between 1.1µA and 4.2µA, depending on testing conditions

•             Improved functionality due to providing a guaranteed start-up circuit

•             Improved functionality due to providing an amplifier with a gain of over 60 dB at the operating point, such as at an output voltage of 1.15V

•             Improved performance due to providing line regulation that is within a millivolt of a typical circuit

•             Improved performance due to providing a start-up circuit with ramp rates that...