Browse Prior Art Database

Method for early CKE exit

IP.com Disclosure Number: IPCOM000127761D
Publication Date: 2005-Sep-13
Document File: 7 page(s) / 469K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for early clock enable (CKE) exit. Benefits include improved performance.

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Method for early CKE exit

Disclosed is a method for early clock enable (CKE) exit. Benefits include improved performance.

Background

              Dynamic clock enabling has slow performance that is required to be improved. No conventional solution is available because the controller cannot exit early from low-power DRAM states.

              Conventionally, CKE deassertion must wait until the end of the read or write transaction. Address and command input buffers are disabled when CKE is registered low along with an NOP or deselect command.

              The conventional operation is illustrated by an example where an outstanding read command exists. Assume the following:

•             DDR3-1600 timings are used.

•             Additive latency is 0.

•             Low power state is precharge power down.

•             Last command issued before entering power down is RDA.

             

First RD

command can be issued after CKE is asserted after a delay:

9 (tRDPDEN=RL+BL+1) + 20 (tXPDLL) clocks= 29 clocks

General description

              The disclosed method improves the performance of systems using dynamic CKE. The CKE signal is asserted as soon as the tCKE timings are satisfied. Waiting until the end of the read or write transaction, an additional tCKE period, and exit time from a DRAM low-power state is eliminated.

              The method applies when the controller has initiated the power down process but another outstanding transaction is received from the processor before the end of the read or write transaction.

Advantages

              The disclosed method provides improved performance due to exiting early from low-power states when using dynamic CKE.

Detailed description

      The disclosed method defers power-down entry after registering CKE low until all pending read or write operations have completed. When CKE is asserted low before the end of a read or write transaction, CKE must be maintained low until the device begins power down entry in the timing waveforms. The tCKE specification is measured from the point where the device begins power down entry in the waveforms (see Figures 1 and 2).

              If the last command is a read or write with auto-precharge, the device enters precharge power down when all banks are closed at the end of all pending read or write operations. Power down Idd specifications do not apply until the precharge operation is finished within the device (see Figures 3 and 4).

              The timing parameters are summarized in a table (see Figure 5).

              The rules for asserting CKE are as follows:

•             CKE must be asserted at least one clock tick before the end of tRDPDEN so it is sampled high in clo...