Browse Prior Art Database

CHIP ASSEMBLY TOOLS

IP.com Disclosure Number: IPCOM000127925D
Original Publication Date: 1982-Dec-31
Included in the Prior Art Database: 2005-Sep-14
Document File: 7 page(s) / 28K

Publishing Venue

Software Patent Institute

Related People

Stephen Trimberger: AUTHOR [+4]

Abstract

In large-scale integrated circuit design, chip assembly for more difficult, more time consuming, and more error prone than the design of the low-level cells. Assembly errors tend to persist until late in the design cycle requiring extensive rework Unfortunately, the tools traditionally provided for custom Integrated circuit design address the problems of cell design well, but do net property address the problems of chip assembly. A great deal of emphasis at Caltech has been placed on tools that do address chip assembly. This paper reports on some of these tools.

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THIS DOCUMENT IS AN APPROXIMATE REPRESENTATION OF THE ORIGINAL.

CHIP ASSEMBLY TOOLS

Stephen Trimberger and Chris Kingsley California Institute of Technology Pasadena, California 91125

TM #5005

ABSTRACT

In large-scale integrated circuit design, chip assembly for more difficult, more time consuming, and more error prone than the design of the low-level cells. Assembly errors tend to persist until late in the design cycle requiring extensive rework Unfortunately, the tools traditionally provided for custom Integrated circuit design address the problems of cell design well, but do net property address the problems of chip assembly. A great deal of emphasis at Caltech has been placed on tools that do address chip assembly. This paper reports on some of these tools.

INTRODUCTION

Custom integrated circuit layout can be spin into two major parts: cell design, the development of the tow level cells making up the "leaves" of the hierarchical arse; and composition, assembly of those cells into larger cells and systems [Rawson 19801 Although composition is at least as time consuming as calf layout [Wedig 1981 ], curren t design systems address low-level cell design, and rely on physical positioning and orientation to compose chips. These operations are rat necessarily helpful M composition, since the kinds of operations required to perform the two kinds of operations are different. Composition systems do not preclude custom design, since they can be built to give the designer control of the connection mechanism

COMPOSITION TOOL OVERVIEW

To avid errors in composition, a system must have primitive operations which attach connectors on instances as well as position them. Proper connection operations free the designer from a whole class of mistakes, eliminating much of the post-design checking, like geometrical design rule checking. The primitive operations used in Caltech'a composition cods are abutment, routing and stretching. If the connectors on the instances to be connected are Perfectly aligned, the instances may be abutted to make the connection (figure 1). Unfortunately, this is rarely the case. When the connectors do not match, connection may be made by creating a piece of routing wiring between the cells

(Image Omitted: Figure 1. Connection by Abutment.)

(figure 2). Composition in industry typically uses general routing to connect instances -- a wasteful practice. Composition tools at Caltech generally restrict the complexity of the routing giving the global routing task to the user explicitly.

California Institute of Technology Page 1 Dec 31, 1982

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CHIP ASSEMBLY TOOLS

(Image Omitted: Figure 2. Connection by Routing.)

In many cases, global chip area can be reduced and global chip performance increased by stretching the cells to connect by abutment instead of placing the cells and routing between them (figure 3) [Jahannaen 1981 ]. Stretching does not require any wiring channels, but does require that the positions of component...