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SUBMICRON SYSTEMS ARCHITECTURE Semiannual Technical Report

IP.com Disclosure Number: IPCOM000127930D
Original Publication Date: 1983-Dec-31
Included in the Prior Art Database: 2005-Sep-14
Document File: 21 page(s) / 62K

Publishing Venue

Software Patent Institute

Related People

Charles L Seitz: AUTHOR [+8]

Abstract

The central theme of this research is the architecture and design of VLSI systems appropriate to a microcircuit technology scaled to submicron feature sizes, and includes related efforts in concurrent computation and VLSI design. Additional background information can be found in previous semiannual technical reports [5052:TR:82, 5078:TR:83).

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THIS DOCUMENT IS AN APPROXIMATE REPRESENTATION OF THE ORIGINAL.

SUBMICRON SYSTEMS ARCHITECTURE Semiannual Technical Report

Charles L Seitz Randal E Bryant James T Kajiya Alain J Martin Robert J McEliece Martin Rem Charles L Seitz

Sponsored by Defense Advanced Research Projects Agency ARPA Order Number 3771

Monitored by the Office of Naval Research Contract Number N00014-79-C-0597

I - Ove rvi ev a ad S umma ry

1.1 Scope of this Report

This document reports the research activities and results for the period 16 April 1983 to 15 October 1983 under the Defense Advanced Research Project Agency (ARPA) Submicroa Systems Architecture Project.

1.2 Objectives

The central theme of this research is the architecture and design of VLSI systems appropriate to a microcircuit technology scaled to submicron feature sizes, and includes related efforts in concurrent computation and VLSI design. Additional background information can be found in previous semiannual technical reports [5052:TR:82, 5078:TR:83).

1.3 Highlights

The highlights of the previous 6 months are:

(1) The cosmic cube, a 64-element experimental homogeneous machine, was completed and is now in regular use. Benchmarks of this system show it outrunning a VAX11/780 by a factor of 6 on two large regular computations. Numerous other application programs are in progress for this machine. A new operating system, the cosmic kernel, has been defined and its code is being written.

(2) Prototype mosaic processors have been packaged with fast off-chip storage for a small mosaic-tree for software experiments. Meanwhile, the efforts in the design of the single chip mosaic element are approaching completion, with the storage section designed and several processor improvements accomplished, including interrupts, a multiply intruction, a faster control PLA, and new microcode.

(3) The algorithms for and logical design of the super mesh element are complete and have been simulated with MOSSIM.

California Institute of Technology Page 1 Dec 31, 1983

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SUBMICRON SYSTEMS ARCHITECTURE Semiannual Technical Report

(4) FMOSSIM, a concurrent fault simulator for MOS digital systems, is now operational. This program uses the same switch-level representation of 1409 circuits as the logic simulator MOSSIM II, and so can model such MOS circuit structures as (bidirectional) pass transistors, static and precharged logic, busses, and both static and dynamic memory. The concurrent simulation techniques of FMOSSIM simultaneously models the good circuit and a large number of faulty circuits, and consequently requires much less CPU time than simple serial fault simulation.

2. ARCHITECTURAL EXPERIMENTS

We have three architectural experiments, Cosmic Cube, Mosaic, and Super Mesh, in various phases of design, construction, programming, and use. These machines are all ensembles of identical, concurrently operating, and regularly interconnected elements that communicate by message passing (5102:TR:831. Our priority ia...