Browse Prior Art Database

SUBMIGRON SYSTEMS ARCHITECTURE

IP.com Disclosure Number: IPCOM000127958D
Original Publication Date: 1987-Dec-31
Included in the Prior Art Database: 2005-Sep-14
Document File: 29 page(s) / 91K

Publishing Venue

Software Patent Institute

Related People

Charles L Seitz: AUTHOR [+3]

Abstract

This document is a summary of the research activities and results for the seven-month period, 1 April 1987 to 31 October 1987, under the Defense Advanced Re-search Project Agency (DARPA) Submicron Systems Architecture Project. Tech-nical reports covering parts of the project in detail are listed following these sum maries, and can be ordered from the Caltech Computer Science Library.

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THIS DOCUMENT IS AN APPROXIMATE REPRESENTATION OF THE ORIGINAL.

SUBMIGRON SYSTEMS ARCHITECTURE

`~ Semiannual Technical Report

Department of Computer Science California Institute of Technology

[5258:TR:871

11 November 198?

Reporting Period: 1 April 1987 - 31 October 1987 ~ Principal Investigator: Charles L Seitz

Faculty Investigators: William C. Athas K. Mani Chandy Alain J. Martin Martin Rem Charles L. Seitz Sponsored by the Defense Advanced Research Projects Agency ARPA Order Numbers 3771 & 6202

Monitored by the Office of Naval Research Contract Numbers N00014-79-0597 & N00014-87-K SUBMICRON SYSTEMS ARCHITECTURE Department of Computer Science `~ California Institute of Technology

1. Overview and Summary

1.1 Scope of this Report

This document is a summary of the research activities and results for the seven-month period, 1 April 1987 to 31 October 1987, under the Defense Advanced Re-search Project Agency (DARPA) Submicron Systems Architecture Project. Tech-nical reports covering parts of the project in detail are listed following these sum maries, and can be ordered from the Caltech Computer Science Library.

'~ 1.2 Objectives

The central theme of this research is the architecture and design of VLSI sys-tems appropriate to a microcircuit technology scaled to submicron feature sizes. Our work is focused on VLSI architecture experiments that involve the design, construc-tion, programming, and use of experimental message-passing concurrent computers, and includes related efforts in concurrent computation and VLSI design.

Additional background information can be found in previous semiannual tech-nical reports [5052:TR:82], [5078:TR:83], (5103:TR:83(, (5122:TR:841, [5160:TR:84], (5178:TR:85(, (5202:TR:851, [5220:TR:86], [5235:'TR:86], [5240:TR:87].

1.3 Highlights

California Institute of Technology Page 1 Dec 31, 1987

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SUBMIGRON SYSTEMS ARCHITECTURE

Some highlights of the previous seven months are: * The Reactive Kernel and version 7 Cosmic environment, the essential system software for the second-generation Cosmic Cubes, are complete and in daily use on first-generation "cubes" and several other concurrent architectures (sections 2.1, 2.3, 3.2, 3.3, 3.5). * Concise, a concurrent circuit simulation program, runs on the Intel iPSC/1 and exhibits excellent performance and speedup (section 3.5).

* Several new results in self-timed VLSI designs (sections 4.3-4.6). * Self-timed routing chips for second-generation multicomputers have been de-signed, simulated, and sent to fabrication (section 4.7).

-1-

2. Architecture Experiments

2.1 Cosmic Cube Project

Bill Athas, Michael Lichter, Wen-King Su, Jakov Seizovic, Chuck Seitz This section summarizes the current usage and the hardware and software status of the Cosmic Cubes and Intel iPSC/1 d7. Research developments are described in sections 2.3, 3.2, and 3.3 of this report. The Cosmic Cubes and our Intel iPSC/1 d7 continue to operate reliably. Overall usage has been moderately heavy,...