Browse Prior Art Database

SUBMICRON SYSTEMS ,ARCHITECTURE

IP.com Disclosure Number: IPCOM000127961D
Original Publication Date: 1988-Dec-31
Included in the Prior Art Database: 2005-Sep-14
Document File: 23 page(s) / 75K

Publishing Venue

Software Patent Institute

Related People

Charles L. Seitz: AUTHOR [+3]

Abstract

The central theme of this research is the architecture and design of VLSI systems appropriate to a microcircuit technology scaled to submicron feature sizes. Our work is focused on VLSI architecture experiments that involve the design, construction, programming, and use of experimental message-passing concurrent computers, and includes related efforts in concurrent computation and VLSI design.

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THIS DOCUMENT IS AN APPROXIMATE REPRESENTATION OF THE ORIGINAL.

SUBMICRON SYSTEMS ,ARCHITECTURE

Semiannual Technical Report

Department of Computer Science California Institute of Technology

Caltech-CS-TR-.88-18 9 November 1988 Reporting Period: 1 April 1.988 - 31 October 1988 (7 months)

Principal Investigator: Charles L. Seitz

Faculty Investigators: William C. Athas K. Mani Chandy Alain J" Martin Martin Rem Charles L. Seitz Stephen Taylor Sponsored by the Defense Advanced Research Projects Agency DARPA Order Number 6202 . Monitored by the Office of Naval Research Contract Number N00014-87- K SUBMICRON SYSTEMS ARCHITECTURE Department of Computer Science California Institute of Technology

1. Overview and Summary

1.1 Scope of this Report

This document is a summary of the research activities and results for the seven-month period, 1 April 1988 to 31 October 1988, under the Defense Advanced Research Project Agency (DARPA) Submicron Systems Architecture Project. Previous semiannual technical reports and other technical reports covering parts of the project in detail are listed following these summaries, and can be ordered from the Caltech Computer Science Library.

1.2 Objectives

The central theme of this research is the architecture and design of VLSI systems appropriate to a microcircuit technology scaled to submicron feature sizes. Our work is focused on VLSI architecture experiments that involve the design, construction, programming, and use of experimental message-passing concurrent computers, and includes related efforts in concurrent computation and VLSI design.

1.3 Changes in Key Personnel

Dr. William C. Athas completed his appointment as a Postdoctoral Research Fellow .in Computer Science in August 1988, and has joined the faculty at the University of Texas at Austin as an Assistant Professor of Computer Science. Dr. Stephen Taylor, a new PhD from the Weizmann Institute of Science and the author of a multicomputer implementation of flat

California Institute of Technology Page 1 Dec 31, 1988

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SUBMICRON SYSTEMS ,ARCHITECTURE

concurrent prolog, joined the project in September 1988 with an appointment at Caltech as an Instructor in Computer Science. _ 1_

2. Architecture Experiments

2.1 Mosaic Project

Bill Athas, Charles Flaig, Glenn Lewis, Jakov Seizovic, Don Speck, Wen-King Su, Tony Wittry, Chuck Seitz

The Mosaic C is an experimental multicomputer with single-chip nodes, currently in development. The stipulation that the nodes fit on a single chip so limits the storage for each node that relatively fine-grain concurrent. programming techniques must be used. The Mosaic C will be programmed using the Cantor programming language, a fine-grain object-based (or Actor) language. We are working toward building a 16K-node Mosaic system using nodes fabricated in 1.2Am CMOS technology, with a near-term milestone of a 1K-node system using nodes fabricated in 1.6,um CMOS.

Much of our effort in this period has been concentrated on...