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A new inverse-modeling-based technique for sub-100-nm MOSFET characterization

IP.com Disclosure Number: IPCOM000128063D
Original Publication Date: 1999-Dec-31
Included in the Prior Art Database: 2005-Sep-14
Document File: 9 page(s) / 31K

Publishing Venue

Software Patent Institute

Related People

Zachary K. Lee: AUTHOR [+3]

Related Documents

http://theses.mit.edu:80/Dienst/UI/2.0/Describe/0018.mit.theses/1999-121: URL

Abstract

Performance and density of VLSI circuits have been rapidly improving over the years as transistors are miniaturized. As MOSFET transistor gates are scaled to the sub-100 nm regime, however, subtle details of the two-dimensional (2D) and three-dimensional (3D) redistribution of dopants, due to thermal diffusion during the fabrication process, strongly determine the shortchannel effects, which ultimately limit device operation and performance.

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 This record is the front matter from a document that appears on a server at MIT and is used through permission from MIT. See http://theses.mit.edu:80/Dienst/UI/2.0/Describe/0018.mit.theses/1999-121 for copyright details and for the full document in image form.

A New Inverse-Modeling-Based Technique for Sub-100-nm MOSFET Characterization

by

Zachary K. Lee


B.Sc. in Physics, University of British Columbia, 19$9 M.A.Sc. in Electrical Engineering, University of British Columbia 1992 Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical Engineering and Computer Science

at the Massachusetts Institute of Technology November 3, 1998 [February, 1999] SIGNATURE OF author: [[signature omitted]]

Department of Electrical Engineering and Computer Science November 3, 1998 Department of Electrical Engineering and Computer Science November 3, 1998 CERTIFIED BY: [[SIGNATURE OMITTED]]

Dimitri A. Antoniadis Professor of Electrical Engineering Thesis Supervisor ACCEPTED BY: [[SIGNATURE OMITTED]]

Arthur C. Smith Professor of Electrical Engineering Graduate Officer ARCHIVES MASSACHUSETTS INSTITUTE OF TECHNOLOGY LIBRARIES MAR 05 1999

Massachusetts Institute of Technology Page 1 Dec 31, 1999

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A new inverse-modeling-based technique for sub-100-nm MOSFET characterization

A New Inverse-Modeling-Based Technique for Sub-100-nm MOSFET characterization

by

Zachary K. Lee

Submitted to the Department of Electrical Engineering and Computer Science on November 3, 1998 in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy in Electrical Engineering and Computer Science

Abstract

Performance and density of VLSI circuits have been rapidly improving over the years as transistors are miniaturized. As MOSFET transistor gates are scaled to the sub-100 nm regime, however, subtle details of the two-dimensional (2D) and three-dimensional (3D) redistribution of dopants, due to thermal diffusion during the fabrication process, strongly determine the shortchannel effects, which ultimately limit device operation and performance.

In order to suppress short-channel effects, extensive use of nonuniform doping profiles are found in modern devices. Among these are the super-steep retrograde (SSR) channel profile, characterized by a low dopant concentration near the surface and a high dopant concentration at some depth from the surface, and the halo doping, characterized by a laterally non-uniform doping profile across the device channel. In order to engineer a device having good shortchannel characteristics and performance, through dopant engineering, the 2D dopant distribution must be known accurately. A 2D doping profile characterization technique is therefore very important. Not only should it enable device engineering, but it can also be used as a tool for process inonitoring and characterization. One dimensional (l D) profiling techniques such as the C-V method and SIMS have been widely used. D...