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SAMPLE PROGRAMS FOR A HYPOTHETICAL COMPUTER

IP.com Disclosure Number: IPCOM000128358D
Original Publication Date: 1974-Dec-31
Included in the Prior Art Database: 2005-Sep-15
Document File: 10 page(s) / 40K

Publishing Venue

Software Patent Institute

Related People

Gary J. Nutt: AUTHOR [+3]

Abstract

The multi associative processor (MAP) computer system is a hypo-thetical machine employing multiple control units and pools of identical processing elemen ts. Each control unit, along with a subset of the pro-cessing elements, operates on a single instruction stream and multiple data streams. Processing elements are activated and deactivated by conditions preserved in an internal register, hence the term associative processor. In this paper, a brief overview of the MAP system is given, and a battery of programs for the MAP system is discussed. The programs are executed via an interpreter to investigate possible application areas for this architecture as well as to test various designs that have been incorporated into the model.

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THIS DOCUMENT IS AN APPROXIMATE REPRESENTATION OF THE ORIGINAL.

SAMPLE PROGRAMS FOR A HYPOTHETICAL COMPUTER

by Gary J. Nutt Department of Computer Science University of Colorado Boulder, Colorado 80302

Report # CU-CS-058-74 October 1974

1

ABSTRACT The multi associative processor (MAP) computer system is a hypo-thetical machine employing multiple control units and pools of identical processing elemen ts. Each control unit, along with a subset of the pro-cessing elements, operates on a single instruction stream and multiple data streams. Processing elements are activated and deactivated by conditions preserved in an internal register, hence the term associative processor. In this paper, a brief overview of the MAP system is given, and a battery of programs for the MAP system is discussed. The programs are executed via an interpreter to investigate possible application areas for this architecture as well as to test various designs that have been incorporated into the model.

Introduction

The multi associative processor (MAP) computer system is a hypo- thetical machine employing multiple control units and pools of identical processing elements. Each control unit, in combination' with a subset of the processing elements, operates'on a single instruction stream through the control unit and multiple dat6 streams, one through . each processing element, (i.e., SIMD operation).' Each'processing element contains a select register for which the result of up to eight conditional tests can be stored (corresponding to the activity bit in an array processor). Processing element participation in instruction execution is determined by the current contents of the select register, and a corresponding key broadcast to each PE by the control unit. It isIthis capability that leads to the name 11associative processor," and the existence of multiple control units that leads to the name "multi associative processor."

In this paper a brief overview of the system is given al;o.ng with a description of some programs for the MAP system. The programs may be considered,to be benchmark programs although they are not used so.much for comparative purposes [9,141, but rather as a medium to investigate possible application areas for the architecture. These programs are executed on an interpreter in order that their MAP resource utilization can be monitored and their ability to perform calculations can be tested. Other "synthetic programs" are also discussed, the purpose of these pro-grams being to exercise certain portions of the MAP architecture.

The MAP Architecture

1 This work was supported by the National Science Foundation under grant No. GJ-42251.

University of Colorado Page 1 Dec 31, 1974

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SAMPLE PROGRAMS FOR A HYPOTHETICAL COMPUTER

MAP might just as well be an acronym for "multi arr ay processor" as 11multi associative processor." The MAP system is composed of eight control units (CUs) coupled to an arbitrary number of processing elements (PEs), e...