Browse Prior Art Database

A Variation Tolerant Keeper Technique for Wide Static MUX Latches

IP.com Disclosure Number: IPCOM000128956D
Publication Date: 2005-Sep-22
Document File: 2 page(s) / 122K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses a reconfigurable keeper for wide static MUX latches. Benefits include decreasing delays and power needs in all circuits where wide static MUX latch circuits are used.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 60% of the total text.

A Variation Tolerant Keeper Technique for Wide Static MUX Latches

Disclosed is a method that uses a reconfigurable keeper for wide static MUX latches. Benefits include decreasing delays and power needs in all circuits where wide static MUX latch circuits are used.

Background

Uncertain process parameters increase the spread between typical and worst-case design corners. It is imperative to have an adequate delay over the whole robustness-delay design space. N-to-1 MUX latch circuits are used in microprocessors for wide static register files and bypass interface circuits (see Figure 1). This circuit selects one of the N input signals, D1-DN, depending on the Select1-SelectN signals. The conventional MUX latch is implemented with a complementary keeper that is sized so that the required noise margin is obtained at the worst-case leakage and noise condition. However, only a small fraction of the manufactured die have a worst-case leakage behavior. For the typical die at normal supply voltage conditions, the keeper is oversized and the noise margin is larger than required. The oversized keeper increases the contention at node X, increasing the delay and power dissipation for the MUX latch.

General Description

The disclosed method uses a reconfigurable keeper for wide static MUX latches. The strength of the keeper is programmed by a number of control bits that are provided externally or internally on-chip. The number of bits needed to program the keeper strength is determined by t...