Browse Prior Art Database

Diffusion resistor to protect the gate insulating film of MOS test structures against process induced damage

IP.com Disclosure Number: IPCOM000128997D
Original Publication Date: 2005-Oct-25
Included in the Prior Art Database: 2005-Oct-25
Document File: 2 page(s) / 108K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

Fabrication of integrated semiconductor devices includes several plasma assisted processing steps. Hereby plasma charges are collected by a large antenna. It happens that the device gets damaged in this procedure. Particularly the gate insulating layer could be damaged when plasma charges flow from the gate into the substrate tunnelling through a thin insulating layer of a small window. Therefore, special design rules (antenna rules) are established to avert the damaging by limiting the antenna rotation. In some dielectric test structures however, these antenna rules must be disobeyed when the gate of single FET (Field-Effect Transistor) or small FET-arrays or capacitors are connected to probing pads which usually provide a much larger area than the test device. Special elements are required to protect the test device against Process Induced Damage (PID).

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 63% of the total text.

Page 1 of 2

S

Diffusion resistor to protect the gate insulating film of MOS test structures against process induced damage

Idea: Dr. Martin Kerber, DE Munich

Fabrication of integrated semiconductor devices includes several plasma assisted processing steps. Hereby plasma charges are collected by a large antenna. It happens that the device gets damaged in this procedure. Particularly the gate insulating layer could be damaged when plasma charges flow from the gate into the substrate tunnelling through a thin insulating layer of a small window. Therefore, special design rules (antenna rules) are established to avert the damaging by limiting the antenna rotation. In some dielectric test structures however, these antenna rules must be disobeyed when the gate of single FET (Field-Effect Transistor) or small FET-arrays or capacitors are connected to probing pads which usually provide a much larger area than the test device. Special elements are required to protect the test device against Process Induced Damage (PID).

The following idea proposes a diffusion resistor as protecting element for PID. The metal line between the charge collecting antenna (e.g. probing pad) and the gate electrode of the test device is interrupted. The current is forced to flow into the diffusion layer before it can bias the gate terminal to a critical damaging value. This construction assures that all plasma charges first flow into the protecting element before it reaches the gate terminal. This constructi...