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Driver circuit for AIRBAG technology

IP.com Disclosure Number: IPCOM000129015D
Published in the IP.com Journal: Volume 5 Issue 10A (2005-10-25)
Included in the Prior Art Database: 2005-Oct-25
Document File: 2 page(s) / 34K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

In current AIRBAG application systems it is wanted to provide the gate driver circuits of the Power Metal Oxide Semiconductors (Power-MOS) to have a fast transient response and a stable AC (Alternating Current) at all times. The following circuit is a GA-FBB (General Amplifier Feed-Back Biased) class AB driving stage for high voltage AIRBAG applications that efficiently drives a Power-MOS switch. It has the advantage to obtain a fast transient response to load variations and to also show an acceptable AC stability under all conditions. The set-up of this new idea is based on a voltage regulator block as sketched in Fig. 1. An ideal buffer is shown which regulates the gate voltage to a precise reference voltage Vref, that is defined as k*VBG (konst * Vbandgap). The parameter of driving and voltage regulation can be simply modelled as an output resistance Rs. The initial assumption is that this block does not affect the frequency response. The Power-MOS switch with its main capacitances CGS and CGD and the external cap CL with its resistance ESR are connected. Finally, the external load is considered as an ideal PWL (Piecewise-Linear) current source.

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Driver circuit for AIRBAG technology

Idea: Prof. Alberto Gola, IT-Padova; Alberto Flore, IT-Padova; Salvatore Piccolella, IT-Padova;

Incola Macri, IT-Padova

In current AIRBAG application systems it is wanted to provide the gate driver circuits of the Power Metal Oxide Semiconductors (Power-MOS) to have a fast transient response and a stable AC (Alternating Current) at all times.

The following circuit is a GA-FBB (General Amplifier Feed-Back Biased) class AB driving stage for high voltage AIRBAG applications that efficiently drives a Power-MOS switch. It has the advantage to obtain a fast transient response to load variations and to also show an acceptable AC stability under all conditions.

The set-up of this new idea is based on a voltage regulator block as sketched in Fig. 1. An ideal buffer is shown which regulates the gate voltage to a precise reference voltage Vref, that is defined as k*VBG (konst * Vbandgap). The parameter of driving and voltage regulation can be simply modelled as an output resistance Rs. The initial assumption is that this block does not affect the frequency response. The Power-MOS switch with its main capacitances CGS and CGD and the external cap CL with its resistance ESR are connected. Finally, the external load is considered as an ideal PWL (Piecewise- Linear) current source.

The actual scheme of the idea is shown in Fig. 2. A high current capability class AB driver in closed used configuration makes the system stable and reliable an...