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A configurable single-ended / differential receiver

IP.com Disclosure Number: IPCOM000129029D
Original Publication Date: 2005-Oct-25
Included in the Prior Art Database: 2005-Oct-25
Document File: 4 page(s) / 448K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

Many electrical devices are used in two different operation modes: First, in the normal mode (e.g. in the application). Second, in a test mode (e.g. at the manufacturer during testing). Often, the normal mode requires a high-speed interface, which is implemented using differential signaling. The test mode is typically performed at lower speed. Single-ended signaling is preferred, since for a given number of external numbers of external pins, twice as many signals can be transferred compared to differential signaling. Up to now, there are separate pins provided for the single-ended receiver. The disadvantage in this case is that extra efforts for additional pins are necessary adjunctive with additional die size, package cost, and PCB (Printed Circuit Board) cost. Another possibility so far is an additional separate single-ended receiver (as depicted in Fig. 1). Thereby the disadvantage is that it introduces additional capacitive load, deteriorating the speed in normal-mode operation. Thus the problem to be solved is how to implement the normal-mode differential together with the test-mode single-ended signaling. The core of the idea is the usage of a differential amplifier, which may be switched to a single-ended mode, in which it amplifies two independent single-ended input signals, without touching the gates of the input stage.

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A configurable single-ended / differential receiver

Idea: Dr. Wolfgang Spirkl, DE- Munich; Ralf Schledz, DE- Munich; Dr. Martin Streibl, DE-Munich

Many electrical devices are used in two different operation modes: First, in the normal mode (e.g. in the application). Second, in a test mode (e.g. at the manufacturer during testing). Often, the normal mode requires a high-speed interface, which is implemented using differential signaling. The test mode is typically performed at lower speed. Single-ended signaling is preferred, since for a given number of external numbers of external pins, twice as many signals can be transferred compared to differential signaling.

Up to now, there are separate pins provided for the single-ended receiver. The disadvantage in this case is that extra efforts for additional pins are necessary adjunctive with additional die size, package cost, and PCB (Printed Circuit Board) cost. Another possibility so far is an additional separate single- ended receiver (as depicted in Fig. 1). Thereby the disadvantage is that it introduces additional capacitive load, deteriorating the speed in normal-mode operation.

Thus the problem to be solved is how to implement the normal-mode differential together with the test- mode single-ended signaling. The core of the idea is the usage of a differential amplifier, which may be switched to a single-ended mode, in which it amplifies two independent single-ended input signals, without touching the gates of the input stage.

In this solution, there is no additional capacitive gate loading. Furthermore, the two single-ended test- mode signals can be used for each differential input signal.

Examples:

1. Basic configuration

Figure 2 shows a basic configuration of the idea. The differential receiver consists of the current sources C1 and C2, the (closed) switch S1, the differential transistor pair T1 and T2, and the load circuits L1 and L2. The differential input signal is applied to G1 and G2, the gates of T1 and T2; the differential output signal is available at the drains D1 and D2 of the transistors T1 and T2. The transistors T3 and T4 are disabled in differential mode by applying VREF equal to ground potential.

For the single-ended mode, S1 is opened, and the transistors T1 and T3 are...