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What-If IR Drop Analysis : A Method using SPEF Manipulations

IP.com Disclosure Number: IPCOM000130144D
Publication Date: 2005-Oct-13

Publishing Venue

The IP.com Prior Art Database

Related People

N. Kannan: AUTHOR [+3]

Abstract

Power grid in present day SoCs undergoes many changes from conception of floorplan to tapeout. Analysis is performed after every change to validate that voltage drop specs are met. Power Grid Analysis requires implementation of changes in layout, extraction of power network from modified layout and subsequent IR drop analysis with extracted parasitics. Extraction of power network is the most time consuming activity in this flow. What-IF analysis is a method to analyze power network for various scenarios without actual implementation of changes in the layout. Most EDA tools offer What-IF IR Drop analysis only on initial power grid design during floorplanning stage. These tools do re-extraction but due to relatively small data sizes, runtimes are not an issue. Some EDA tools offer WHAT-IF analysis at power grid verification stage but require user to locate the existing resistances in design and modify the resistance values. This requirement makes the utility useless as the user does not have the flexibility of adding new stripes or removing existing stripes. In this disclosure we present a method to perform What-IF analysis based on SPEF manipulations which does not require re-extraction and has capabilities to incorporate and analyze any kind of incremental changes in the power network structure.

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Abstract

What-If IR Drop Analysis : A Method using SPEF Manipulations By: Anuj Singhania, Atul Dogra & N. Kannan

0.1 Abstract

Power grid in present day SoCs undergoes many changes from conception of floorplan to tapeout. Analysis is performed after every change to validate that voltage drop specs are met. Power Grid Analysis requires implementation of changes in layout, extraction of power network from modified layout and subsequent IR drop analysis with extracted parasitics. Extraction of power network is the most time consuming activity in this flow. What-IF analysis is a method to analyze power network for various scenarios without actual implementation of changes in the layout. Most EDA tools offer What-IF IR Drop analysis only on initial power grid design during floorplanning stage. These tools do re-extraction but due to relatively small data sizes, runtimes are not an issue. Some EDA tools offer WHAT-IF analysis at power grid verification stage but require user to locate the existing resistances in design and modify the resistance values. This requirement makes the utility useless as the user does not have the flexibility of adding new stripes or removing existing stripes. In this disclosure we present a method to perform What-IF analysis based on SPEF manipulations which does not require re-extraction and has capabilities to incorporate and analyze any kind of incremental changes in the power network structure.

0.2 Background

With increasing speed targets of design and reduced voltages, voltage drop in power network has significant impact on performance of chip. Very careful design and analysis of power grid is required to meet stringent design targets. Power Grid Analysis requires extraction of parasitics of power network. These parasitics in format of SPEF are supported by industry tools.

What-IF analysis in present day tools mostly refer to analysis for various scenarios with existing power network mesh. However, if there are changes being done to power mesh, then these tools require extraction of the modified database for analysis.

Some EDA tools do offer What-IF analysis for scenarios involving modifications in power network. These tools require designer to identify the resistor (not the stripe) in extracted power mesh and do manual changes to resistance values. A single stripe can be comprised of hundreds of nodes which makes it virtually impossible for designer to use this utility.

Extraction of power network is the biggest bottleneck in voltage drop analysis. The concept of incremental power network extraction is also not possible because incremental extraction is done for complete net topology, rather than segments of net. With present generation tools, a designer does not have any option to avoid time consuming step of extraction for incremental power grid analysis. Designer needs a method to perform quick analysis for small changes as in adding/deleting few stripes of metal from power network. Based upon result...