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Browse Prior Art Database

Clock Redundancy in Ring Topology

IP.com Disclosure Number: IPCOM000130293D
Original Publication Date: 2005-Nov-25
Included in the Prior Art Database: 2005-Nov-25
Document File: 4 page(s) / 1M

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

Switching nodes in Asynchronous Transfer Mode (ATM) systems shall have synchronized clocks in order to have best performance. Moreover redundancy is desired to keep that performance in case of failure. At present, synchronization is realized by extracting the clock used by the neighboring node from the data received in the Ingress ports. If the physical connection from which the clock is extracted is lost, a node may look for an alternative unaffected clock source or switch to an internal clock source. Switching to an internal clock source entails that the clock will no longer be identical to the other clock within the network. This can be inhibited by using Synchronous Status Messaging (SSM) messages per International Telecommunication Union (ITU) G.781 but is not specified for many types of interface (e.g. Plesiochronous Digital Hierarchy (PDH) interfaces). Moreover this solution is expensive. The suggested solution is applicable to inexpensive ring architectures. A two-output external clock source (which may be doubled for high reliability) distributes the clock signal through all nodes in the network in two paths - clockwise and counter clockwise. When a connection is lost, simple reconfiguration will take place and there will still be two paths.

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Clock Redundancy in Ring Topology

Idea: Moshe Shaul, IL-Yahud?

Switching nodes in Asynchronous Transfer Mode (ATM) systems shall have synchronized clocks in order to have best performance. Moreover redundancy is desired to keep that performance in case of failure.

At present, synchronization is realized by extracting the clock used by the neighboring node from the data received in the Ingress ports. If the physical connection from which the clock is extracted is lost, a node may look for an alternative unaffected clock source or switch to an internal clock source. Switching to an internal clock source entails that the clock will no longer be identical to the other clock within the network. This can be inhibited by using Synchronous Status Messaging (SSM) messages per International Telecommunication Union (ITU) G.781 but is not specified for many types of interface (e.g. Plesiochronous Digital Hierarchy (PDH) interfaces). Moreover this solution is expensive.

The suggested solution is applicable to inexpensive ring architectures. A two-output external clock source (which may be doubled for high reliability) distributes the clock signal through all nodes in the network in two paths - clockwise and counter clockwise. When a connection is lost, simple reconfiguration will take place and there will still be two paths.

A simplified embodiment of a node structure which is not connected to an external clock source is shown in Figure 1. The Ingress and Egress ports are used to connect to other nodes. Two identical clock signals - clk1 and clk2 - are extracted from the Ingress ports. A Clock Unit CU1 selects the source for clk1 to be Ingress port 1 or 2. Similarly, CU2 selects...