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Requirements for Edge-to-Edge Emulation of Time Division Multiplexed (TDM) Circuits over Packet Switching Networks (RFC4197)

IP.com Disclosure Number: IPCOM000130588D
Original Publication Date: 2005-Oct-01
Included in the Prior Art Database: 2005-Oct-28
Document File: 25 page(s) / 48K

Publishing Venue

Internet Society Requests For Comment (RFCs)

Related People

M. Riegel: AUTHOR

Abstract

This document defines the specific requirements for edge-to-edge emulation of circuits carrying Time Division Multiplexed (TDM) digital signals of the Plesiochronous Digital Hierarchy as well as the Synchronous Optical NETwork/Synchronous Digital Hierarchy over packet-switched networks. It is aligned to the common architecture for Pseudo Wire Emulation Edge-to-Edge (PWE3). It makes references to the generic requirements for PWE3 where applicable and complements them by defining requirements originating from specifics of TDM circuits.

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This is the abbreviated version, containing approximately 6% of the total text.

Network Working Group                                          M. Riegel
Request for Comments: 4197                                    Siemens AG
Category: Informational                                     October 2005


              Requirements for Edge-to-Edge Emulation of
             Time Division Multiplexed (TDM) Circuits over
                       Packet Switching Networks

Status of This Memo

   This memo provides information for the Internet community.  It does
   not specify an Internet standard of any kind.  Distribution of this
   memo is unlimited.

Copyright Notice

   Copyright (C) The Internet Society (2005).

Abstract

   This document defines the specific requirements for edge-to-edge
   emulation of circuits carrying Time Division Multiplexed (TDM)
   digital signals of the Plesiochronous Digital Hierarchy as well as
   the Synchronous Optical NETwork/Synchronous Digital Hierarchy over
   packet-switched networks.  It is aligned to the common architecture
   for Pseudo Wire Emulation Edge-to-Edge (PWE3).  It makes references
   to the generic requirements for PWE3 where applicable and complements
   them by defining requirements originating from specifics of TDM
   circuits.

Riegel                       Informational                      [Page 1]
RFC 4197                 PWE3 TDM Requirements              October 2005


Table of Contents

   1. Introduction ....................................................3
      1.1. TDM Circuits Belonging to the PDH Hierarchy ................3
           1.1.1. TDM Structure and Transport Modes ...................4
      1.2. SONET/SDH Circuits .........................................4
   2. Motivation ......................................................5
   3. Terminology .....................................................6
   4. Reference Models ................................................7
      4.1. Generic PWE3 Models ........................................7
      4.2. Clock Recovery .............................................7
      4.3. Network Synchronization Reference Model ....................8
           4.3.1. Synchronous Network Scenarios ......................10
           4.3.2. Relative Network Scenario ..........................12
           4.3.3. Adaptive Network Scenario ..........................12
   5. Emulated Services ..............................................13
      5.1. Structure-Agnostic Transport of Signals out of the
           PDH Hierarchy .............................................13
      5.2. Structure-Aware Transport of Signals out of the
           PDH Hierarchy ...................