Browse Prior Art Database

Method for an FBD host controller

IP.com Disclosure Number: IPCOM000130731D
Publication Date: 2005-Nov-03
Document File: 5 page(s) / 155K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a fully-buffered-dual inline memory module (FBD) host controller. Benefits include improved functionality and improved performance.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 56% of the total text.

Method for an FBD host controller

Disclosed is a method for a fully-buffered-dual inline memory module (FBD) host controller. Benefits include improved functionality and improved performance.

General description

              The disclosed method is an FBD host controller that includes an array of 1 or 2 FBD channels. The method uses only those features of the FBD protocol required to meet performance and random access service (RAS) targets for a multicore platform. The method avoids design complexities without compromising memory latency or bandwidth.

Advantages

              The disclosed method provides advantages, including:

•             Improved functionality due to providing an FBD host controller

•             Improved functionality due to simplifying the FBD decoupling of data and commands
•             Improved functionality due to automatically achieving the FBD minimum synchronization frequency by using the super-frame structure

•             Improved performance due to enabling the controller to predict the issuance of RAS and CAS commands

•             Improved performance due to optimizing bandwidth by the usage of Frame 41

Detailed description

              The disclosed method streamlines memory control by implementing the following scheduling rules (see Figures 1, 2, and 3):

•             FBD packets are divided into a repeating 42-frame (super-frame) structure:
-             Only RAS, CAS), and no operation (NOP) commands are allowed in the first 40 frames frame.
-             Frame 42 only enables synchronization.
-             Frame 41 only enables refreshes or configuration cycles, which never occupy the same frame.

•             Only slot A of the FBD frame can be occupied with a command, except for the configuration write, which can only appear in slots B and C.

•             RAS operation is immediately foll...