IEEE Computer Volume 11 Number 1 -- REPOSITORY
Original Publication Date: 1978-Jan-01
Included in the Prior Art Database: 2005-Nov-10
Software Patent Institute
IEEE Computer Society: OWNER [+2]
THIS DOCUMENT IS AN APPROXIMATE REPRESENTATION OF THE ORIGINAL.
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R78-1 -- Kim, Kwang Hae, "Optimizing Architectures in Parallel Processing"
(268 pp., University of California, Berkeley, California)
This paper investigates optimization aspects in designing and operating a parallel processing system of super computing power. Specific subjects studied or results obtained include practical tools for parallelism indication, technical foundation for detecting useful parallelism hidden in parallel programs, a modular architecture for effective parallelism utilization, optimization techniques relevant to machine design, static sequencing and static storage allocation, cost- effective validation of parallel programs, and a scheme for concealing run-time overhead incurred in dynamic optimization.
R78-2 -- Smith, James E., "Detection of Faults in Programmable Logic Arrays"
(25 pp. University of Wisconsin, Madison, Wisconsinl
A new fault model is proposed for the purpose of testing programmable logic arrays. It is shown that a test set for all detectable modeled faults detects a wide variety of other faults. A test generation method for single faults is then outlined. Included is a bound on the size of test sets which indicates that test sets are much smaller than would be required...