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Conference Report: Hierarchical Design Stressed at Design Automation Conference

IP.com Disclosure Number: IPCOM000131249D
Original Publication Date: 1978-Oct-01
Included in the Prior Art Database: 2005-Nov-10
Document File: 5 page(s) / 23K

Publishing Venue

Software Patent Institute

Related People

John P. Gray: AUTHOR [+3]

Abstract

California Institute of Technology

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This record contains textual material that is copyright ©; 1978 by the Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Contact the IEEE Computer Society http://www.computer.org/ (714-821-8380) for copies of the complete work that was the source of this textual material and for all use beyond that as a record from the SPI Database.

Conference Report: Hierarchical Design Stressed at Design Automation Conference

John P. Gray California Institute of Technology

Until recently the general attitude of engineers to design automation was confused -- they questioned its value yet deplored its limited availability. To increase the amount of DA knowledge in the public domain, the 15th in the series of Annual Design Automation Conferences was held June 19-21 at Caesar's Palace, Las Vegas. Due either to this enlightened choice of venue or to spreading paranoia over handling VLSI designs, this year's conference was extremely well attended -- 650 delegates, an increase of 50 percent over last year. However, for those expecting to learn of new tools for survival in technologies governed by Moore's Laws, this conference may have been somewhat disappointing. It was largely more of the same -- PWB layout, testing, IC layout, design languages, logic design, simulation CAM, and graphics.

Hierarchical design.

Cutting across the traditional lineup of papers, however, was a discernible and increasing emphasis on hierarchical design methods. It was explicit in a number of papers, especially those by Preas and Gwyn and by McWilliams and Widdoes. This interest is encouraging. Hierarchically structuring design -- often discussed but seldom practiced -- is our only handle on the complexity problems of VLSI. DA professionals ought to be proselytizing design shops or preparing to face the consequences {more brick-bats thrown their way) of conventional systems that run into the acceptable complexity bounds.

SICLOPS program.

Preas and Gwyn' outlined a method for recursively refining a layout design in a top-down way before proceeding with a bottom-up detailed implementation,

using placement and routing procedures. Their approach attempts to automate the true custom- design process, which builds naturally on previous work by allowing modules to be built from standard cell assemblies, macro cells, and general cell assemblies. It also explicitly recognizes the fact that routing, in an environment with a number of cells of various sizes, cannot be contained by fixed channel widths. It will be interesting to see how the method performs on regular structures when a full implementation exists. The paper deservedly shared the best paper award with one by Tokoro et al.,2 which described a "Module Level Simulation Technique for Systems Composed of LSI and MSI."

Wire-wrap design.

A hierarchical design system for a different technology, wire-wrap boards, was described in the papers by...