Browse Prior Art Database

The Maxc Systems

IP.com Disclosure Number: IPCOM000131306D
Original Publication Date: 1978-May-01
Included in the Prior Art Database: 2005-Nov-10
Document File: 15 page(s) / 53K

Publishing Venue

Software Patent Institute

Related People

Edward R. Fiala: AUTHOR [+3]

Abstract

Xerox Palo Alto Research Center

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 8% of the total text.

Page 1 of 15

THIS DOCUMENT IS AN APPROXIMATE REPRESENTATION OF THE ORIGINAL.

This record contains textual material that is copyright ©; 1978 by the Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Contact the IEEE Computer Society http://www.computer.org/ (714-821-8380) for copies of the complete work that was the source of this textual material and for all use beyond that as a record from the SPI Database.

The Maxc Systems

Edward R. Fiala

Xerox Palo Alto Research Center

The development of this timesharing system led to insights on microprogrammable organization, instruction sets, reliability, and software and firmware development tools.

The process of developing a computer system is not only inherently interesting; it also leads to significant organization concepts that the builders are often impelled to share with others. So it was in our development of the Maxcl and Maxc2 timesharing systems at the Xerox Palo Alto Research Center between 1971 and 1977. From this development came some ideas of system organization that are now seen to have contributed to the success of the effort:

The high availability achieved is attributable to the simple microprogrammable organization of the machines.

Microprogramming organization promotes simplicity by placing much of the complexity in firmware.

This organization of a computer provides the environment for multiple instruction sets.

Causes of failure in integrated circuitry were evenly distributed, but memory error correction was found to be important to overall reliability.

Tools for software and firmware development and design automation are necessary for efficient development.

The Maxc1 and Maxc2 systems

The Maxcl system was designed and completed during the period from February 1971 to April 1973. Maxc2 was designed during 1973, shelved for two years, then finally built and debugged between June 1975 and April 1977. Despite being a one-of-a-kind system, Maxcl has been one of the most consistently available systems on the ARPA network since 1974. We attribute this high availability to the system's simple microprogrammable hardware organization and input/output structure.

Maxc is a medium-scale computer designed to run the Tenex timesharing system' and Interlisp languages developed by Bolt, Beranek, and Newman for ARPA. Tenex was developed on a DEC KA10 processors modified by a large paging box designed by BBN. Our principal reasons for choosing Tenex were to acquire Interlisp for artificial intelligence research and to connect to the ARPA networks 6 SO that the PARC staff could be part of the research community sponsored by ARPA.

The overall mainframe organization of Maxcl is shown in Figure 1 and discussed in the related box. High-speed operation was not a major design objective for the Maxc systems. For significantly higher performance, the slow access time of MOS main storage would have to be

IEEE Computer Society, May 01, 1978 Page 1 IEEE Computer Volume 11 Number 5, Pag...